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authorQingfang Deng <qingfang.deng@siflower.com.cn>2024-05-27 12:24:04 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2024-07-15 18:46:46 +0300
commit93b63f68d00a0483b450b446e2ea5386a1b94213 (patch)
treeb5ac3c7e325e2c94a7eb7151e44060792a970736 /Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
parent6ad8735994b854b23c824dd6b1dd2126e893a3b4 (diff)
downloadlinux-93b63f68d00a0483b450b446e2ea5386a1b94213.tar.xz
riscv: lib: relax assembly constraints in hweight
rd and rs don't have to be the same. In some cases where rs needs to be saved for later usage, this will save us some mv instructions. Signed-off-by: Qingfang Deng <qingfang.deng@siflower.com.cn> Reviewed-by: Xiao Wang <xiao.w.wang@intel.com> Link: https://lore.kernel.org/r/20240527092405.134967-1-dqfext@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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