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author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-25 04:12:23 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-25 04:12:23 +0300 |
commit | 008128cd5948bd3589a9c300e426af4d834029bb (patch) | |
tree | bbcb4308c9d7004ced3bd87ca213d60a8760753e /Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml | |
parent | 39f013440dbf5b1f209eadb3b4665d4f0e840b5b (diff) | |
parent | e8444bb9fd77f153adcc263eab28e3c2bc1cf540 (diff) | |
download | linux-008128cd5948bd3589a9c300e426af4d834029bb.tar.xz |
Merge tag 'i2c-for-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang:
- new drivers for HPE GXP and Loongson 2K/LS7A
- bigger refactorings for i801 and xiic
- gpio driver gained ACPI and SDA-write only support
- the core converted some OF helpers to fwnode helpers
- usual bunch of driver updates
* tag 'i2c-for-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (52 commits)
MAINTAINERS: Add HPE GXP I2C Support
i2c: Add GXP SoC I2C Controller
dt-bindings: i2c: Add hpe,gxp-i2c
i2c: xiic: Remove some dead code
i2c: xiic: Add SCL frequency configuration support
i2c: xiic: Update compatible with new IP version
dt-bindings: i2c: xiic: Add 'xlnx,axi-iic-2.1' to compatible
i2c: i801: Call i801_check_post() from i801_access()
i2c: i801: Call i801_check_pre() from i801_access()
i2c: i801: Centralize configuring block commands in i801_block_transaction
i2c: i801: Centralize configuring non-block commands in i801_simple_transaction
i2c: i801: Handle SMBAUXCTL_E32B in i801_block_transaction_by_block only
i2c: i801: Add i801_simple_transaction(), complementing i801_block_transaction()
Documentation: i2c: correct spelling
dt-bindings: i2c: i2c-st: convert to DT schema
i2c: i801: add helper i801_set_hstadd()
i2c: i801: make FEATURE_BLOCK_PROC dependent on FEATURE_BLOCK_BUFFER
i2c: i801: make FEATURE_HOST_NOTIFY dependent on FEATURE_IRQ
i2c: i801: improve interrupt handler
i2c: st: use pm_sleep_ptr to avoid ifdef CONFIG_PM_SLEEP
...
Diffstat (limited to 'Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml new file mode 100644 index 000000000000..6604dcd47251 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/hpe,gxp-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HPE GXP SoC I2C Controller + +maintainers: + - Nick Hawkins <nick.hawkins@hpe.com> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + const: hpe,gxp-i2c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-frequency: + default: 100000 + + hpe,sysreg: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the global status and enable interrupt registers shared + between each I2C engine controller instance. It enables the I2C + engine controller to act as both a master or slave by being able to + arm and respond to interrupts from its engine. Each bit in the + registers represent the respective bit position. + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + i2c@2600 { + compatible = "hpe,gxp-i2c"; + reg = <0x2500 0x70>; + interrupts = <9>; + #address-cells = <1>; + #size-cells = <0>; + hpe,sysreg = <&sysreg_system_controller>; + clock-frequency = <10000>; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; + }; |