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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2015-03-23 19:18:27 +0300 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2015-03-23 19:18:27 +0300 |
| commit | 188933ac139a6f8ab06cad369bd0200af947b00d (patch) | |
| tree | c4c107528fcf6b82e32a93b0596e13eea7aa9385 /Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt | |
| parent | 4ed0e032c3cf27c6fabc154164d003c4e0ac4654 (diff) | |
| parent | bc465aa9d045feb0e13b4a8f32cc33c1943f62d6 (diff) | |
| download | linux-188933ac139a6f8ab06cad369bd0200af947b00d.tar.xz | |
Merge tag 'v4.0-rc5' into next
Merge with the latest upstream to synchronize Synaptics changes
and bring in new infrastructure pieces.
Conflicts:
drivers/input/mouse/synaptics.c
Diffstat (limited to 'Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt index 4c32ef0b7db8..009f4bfa1590 100644 --- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt @@ -197,7 +197,9 @@ of the following host1x client modules: - sor: serial output resource Required properties: - - compatible: "nvidia,tegra124-sor" + - compatible: For Tegra124, must contain "nvidia,tegra124-sor". Otherwise, + must contain '"nvidia,<chip>-sor", "nvidia,tegra124-sor"', where <chip> + is tegra132. - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt outputs from the controller. - clocks: Must contain an entry for each entry in clock-names. @@ -222,7 +224,9 @@ of the following host1x client modules: - nvidia,dpaux: phandle to a DispayPort AUX interface - dpaux: DisplayPort AUX interface - - compatible: "nvidia,tegra124-dpaux" + - compatible: For Tegra124, must contain "nvidia,tegra124-dpaux". Otherwise, + must contain '"nvidia,<chip>-dpaux", "nvidia,tegra124-dpaux"', where + <chip> is tegra132. - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt outputs from the controller. - clocks: Must contain an entry for each entry in clock-names. |