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| author | Jianqun Xu <jay.xu@rock-chips.com> | 2021-08-16 04:19:43 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-08-17 02:01:49 +0300 |
| commit | 75d1415ea57c1b0e87f786e85e5f478fab5c91be (patch) | |
| tree | 194aa24d202057d08e13a1f4013791a209c1f520 /Documentation/devicetree/bindings/gpio | |
| parent | 5f82afd868a04f65630c22f75b40c60cba418b8e (diff) | |
| download | linux-75d1415ea57c1b0e87f786e85e5f478fab5c91be.tar.xz | |
dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank
In the past we only need on clock which name "pclk" for a gpio controller.
In the new version gpio controller, there add some register to change
debounce clock dynamic, so the dt node needs to add the second clock, we
call it "dbclk".
The clock property need 2 items on some rockchip chips such as RK3568
SoCs.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Link: https://lore.kernel.org/r/20210816011948.1118959-5-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/gpio')
| -rw-r--r-- | Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml index d993e002cebe..0d62c28fb58d 100644 --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -22,7 +22,10 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + items: + - description: APB interface clock source + - description: GPIO debounce reference clock source gpio-controller: true |