diff options
| author | Thierry Reding <treding@nvidia.com> | 2017-08-30 13:04:07 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-12-13 15:42:04 +0300 |
| commit | 91cc07069291d83b3fa90615373640e028068aaf (patch) | |
| tree | 425ad07bfade5a348ff3a4898ab26a47d0616486 /Documentation/devicetree/bindings/display/tegra | |
| parent | 8f7da1578e90bf1af30269dc6dd8806c96e9c683 (diff) | |
| download | linux-91cc07069291d83b3fa90615373640e028068aaf.tar.xz | |
dt-bindings: display: tegra: Update SOR for Tegra186
Update the SOR bindings for Tegra186, in which a new property is
required to identify the instance of the SOR interface and the clock
tree has slightly changed as well.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/display/tegra')
| -rw-r--r-- | Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index 844e0103fb0d..593be44a53c9 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -206,21 +206,33 @@ of the following host1x client modules: - "nvidia,tegra132-sor": for Tegra132 - "nvidia,tegra210-sor": for Tegra210 - "nvidia,tegra210-sor1": for Tegra210 + - "nvidia,tegra186-sor": for Tegra186 + - "nvidia,tegra186-sor1": for Tegra186 - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt outputs from the controller. - clocks: Must contain an entry for each entry in clock-names. See ../clocks/clock-bindings.txt for details. - clock-names: Must include the following entries: - sor: clock input for the SOR hardware - - source: source clock for the SOR clock + - out: SOR output clock - parent: input for the pixel clock - dp: reference clock for the SOR clock - safe: safe reference for the SOR clock during power up + + For Tegra186 and later: + - pad: SOR pad output clock (on Tegra186 and later) + + Obsolete: + - source: source clock for the SOR clock (obsolete, use "out" instead) + - resets: Must contain an entry for each entry in reset-names. See ../reset/reset.txt for details. - reset-names: Must include the following entries: - sor + Required properties on Tegra186 and later: + - nvidia,interface: index of the SOR interface + Optional properties: - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection |