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author | Thomas Gleixner <tglx@linutronix.de> | 2015-12-19 13:49:13 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2015-12-19 13:49:13 +0300 |
commit | 0fa85119cd480c1ded7a81ed64f723fe16a15355 (patch) | |
tree | 8648434601c5112a1d9ab091ab11507fe88e0962 /Documentation/devicetree/bindings/display/msm/hdmi.txt | |
parent | d6ccc3ec95251d8d3276f2900b59cbc468dd74f4 (diff) | |
parent | 1eab0e42450c6038e2bb17da438370fe639973f3 (diff) | |
download | linux-0fa85119cd480c1ded7a81ed64f723fe16a15355.tar.xz |
Merge branch 'linus' into x86/cleanups
Pull in upstream changes so we can apply depending patches.
Diffstat (limited to 'Documentation/devicetree/bindings/display/msm/hdmi.txt')
-rw-r--r-- | Documentation/devicetree/bindings/display/msm/hdmi.txt | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt b/Documentation/devicetree/bindings/display/msm/hdmi.txt new file mode 100644 index 000000000000..379ee2ea9a3d --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/hdmi.txt @@ -0,0 +1,58 @@ +Qualcomm adreno/snapdragon hdmi output + +Required properties: +- compatible: one of the following + * "qcom,hdmi-tx-8996" + * "qcom,hdmi-tx-8994" + * "qcom,hdmi-tx-8084" + * "qcom,hdmi-tx-8974" + * "qcom,hdmi-tx-8660" + * "qcom,hdmi-tx-8960" +- reg: Physical base address and length of the controller's registers +- reg-names: "core_physical" +- interrupts: The interrupt signal from the hdmi block. +- clocks: device clocks + See ../clocks/clock-bindings.txt for details. +- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin +- qcom,hdmi-tx-ddc-data-gpio: ddc data pin +- qcom,hdmi-tx-hpd-gpio: hpd pin +- core-vdda-supply: phandle to supply regulator +- hdmi-mux-supply: phandle to mux regulator + +Optional properties: +- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin +- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin +- power-domains: reference to the power domain(s), if available. +- pinctrl-names: the pin control state names; should contain "default" +- pinctrl-0: the default pinctrl state (active) +- pinctrl-1: the "sleep" pinctrl state + +Example: + +/ { + ... + + hdmi: qcom,hdmi-tx-8960@4a00000 { + compatible = "qcom,hdmi-tx-8960"; + reg-names = "core_physical"; + reg = <0x04a00000 0x1000>; + interrupts = <GIC_SPI 79 0>; + power-domains = <&mmcc MDSS_GDSC>; + clock-names = + "core_clk", + "master_iface_clk", + "slave_iface_clk"; + clocks = + <&mmcc HDMI_APP_CLK>, + <&mmcc HDMI_M_AHB_CLK>, + <&mmcc HDMI_S_AHB_CLK>; + qcom,hdmi-tx-ddc-clk = <&msmgpio 70 GPIO_ACTIVE_HIGH>; + qcom,hdmi-tx-ddc-data = <&msmgpio 71 GPIO_ACTIVE_HIGH>; + qcom,hdmi-tx-hpd = <&msmgpio 72 GPIO_ACTIVE_HIGH>; + core-vdda-supply = <&pm8921_hdmi_mvs>; + hdmi-mux-supply = <&ext_3p3v>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&hpd_active &ddc_active &cec_active>; + pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>; + }; +}; |