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| author | Sean Paul <seanpaul@chromium.org> | 2017-05-04 15:38:21 +0300 |
|---|---|---|
| committer | Sean Paul <seanpaul@chromium.org> | 2017-05-04 15:42:49 +0300 |
| commit | 3c390df3337e54130e4b511ea3bbb868643cc5ea (patch) | |
| tree | 3963984db2528843edcf2a2bb9f281fd150ab784 /Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt | |
| parent | cd4b11d9d524ef457433d42c121e3405765d4a29 (diff) | |
| parent | 8b03d1ed2c43a2ba5ef3381322ee4515b97381bf (diff) | |
| download | linux-3c390df3337e54130e4b511ea3bbb868643cc5ea.tar.xz | |
Merge tag 'drm-for-v4.12' of git://people.freedesktop.org/~airlied/linux into drm-misc-next
Backmerging Dave's 'drm-for-v4.12' pull request now that it's landed. There are
a bunch of non-drm changes which are just random bits we hadn't yet picked up in
misc-next.
main drm pull request for 4.12 kernel
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/CAPM=9ty0jHgzG18zOr5CYODyTqZfH55kOCOFqNnXiWnTb_uNWw@mail.gmail.com
Diffstat (limited to 'Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index 2b1585a34b85..fadf327c7cdf 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -7,6 +7,7 @@ channel output. Required properties: - compatible: "mediatek,<chip>-dsi" + the supported chips are mt2701 and mt8173. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks @@ -25,6 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. Required properties: - compatible: "mediatek,<chip>-mipi-tx" + the supported chips are mt2701 and mt8173. - reg: Physical base address and length of the controller's registers - clocks: PLL reference clock - clock-output-names: name of the output clock line to the DSI encoder |