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authorRob Herring (Arm) <robh@kernel.org>2024-09-11 02:42:37 +0300
committerRob Herring (Arm) <robh@kernel.org>2024-09-13 22:55:11 +0300
commit227e1ac07eaeedba2ee1c7de2b23cb5f0c5feb6c (patch)
treeed06c4a3d967809c81bc6ee4eee0b34e5861fef4 /Documentation/devicetree/bindings/clock
parent0423caceb4599fca7c9575e8d8477e88784c8ae8 (diff)
downloadlinux-227e1ac07eaeedba2ee1c7de2b23cb5f0c5feb6c.tar.xz
dt-bindings: clock: mediatek: Drop duplicate mediatek,mt6795-sys-clock.yaml
The compatible strings for mt6795 clocks are also documented in other schemas: "mediatek,mt6795-apmixedsys" in clock/mediatek,apmixedsys.yaml "mediatek,mt6795-topckgen" in clock/mediatek,topckgen.yaml "mediatek,mt6795-pericfg" in clock/mediatek,pericfg.yaml "mediatek,mt6795-infracfg" in clock/mediatek,infracfg.yaml The only difference is #reset-cells is not allowed in some of these, but that aligns with actual users in .dts files. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240910234238.1028422-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml54
1 files changed, 0 insertions, 54 deletions
diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml
deleted file mode 100644
index 378b761237d3..000000000000
--- a/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml
+++ /dev/null
@@ -1,54 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: MediaTek System Clock Controller for MT6795
-
-maintainers:
- - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
- - Chun-Jie Chen <chun-jie.chen@mediatek.com>
-
-description:
- The Mediatek system clock controller provides various clocks and system
- configuration like reset and bus protection on MT6795.
-
-properties:
- compatible:
- items:
- - enum:
- - mediatek,mt6795-apmixedsys
- - mediatek,mt6795-infracfg
- - mediatek,mt6795-pericfg
- - mediatek,mt6795-topckgen
- - const: syscon
-
- reg:
- maxItems: 1
-
- '#clock-cells':
- const: 1
-
- '#reset-cells':
- const: 1
-
-required:
- - compatible
- - reg
- - '#clock-cells'
-
-additionalProperties: false
-
-examples:
- - |
- soc {
- #address-cells = <2>;
- #size-cells = <2>;
-
- topckgen: clock-controller@10000000 {
- compatible = "mediatek,mt6795-topckgen", "syscon";
- reg = <0 0x10000000 0 0x1000>;
- #clock-cells = <1>;
- };
- };