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authorAdam Ford <aford173@gmail.com>2020-06-03 18:43:28 +0300
committerStephen Boyd <sboyd@kernel.org>2020-06-23 05:04:58 +0300
commit34662f6e30846ae0f82bbc9605deff67781f6616 (patch)
tree1efcdc17e29bd2d129cd00b8ad694df82e44b438 /Documentation/devicetree/bindings/clock
parentf491276a5168598758ea7fc381195e4ba9af39f8 (diff)
downloadlinux-34662f6e30846ae0f82bbc9605deff67781f6616.tar.xz
dt: Add additional option bindings for IDT VersaClock
The VersaClock driver now supports some additional bindings to support child nodes which can configure optional settings like mode, voltage and slew. This patch updates the binding document to describe what is available in the driver. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200603154329.31579-2-aford173@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/idt,versaclock5.txt33
1 files changed, 33 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
index bcff681a4bd0..6165b6ddb1a9 100644
--- a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
+++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
@@ -31,6 +31,29 @@ Required properties:
- 5p49v5933 and
- 5p49v5935: (optional) property not present or "clkin".
+For all output ports, a corresponding, optional child node named OUT1,
+OUT2, etc. can represent a each output, and the node can be used to
+specify the following:
+
+- itd,mode: can be one of the following:
+ - VC5_LVPECL
+ - VC5_CMOS
+ - VC5_HCSL33
+ - VC5_LVDS
+ - VC5_CMOS2
+ - VC5_CMOSD
+ - VC5_HCSL25
+
+- idt,voltage-microvolts: can be one of the following
+ - 1800000
+ - 2500000
+ - 3300000
+- idt,slew-percent: Percent of normal, can be one of
+ - 80
+ - 85
+ - 90
+ - 100
+
==Mapping between clock specifier and physical pins==
When referencing the provided clock in the DT using phandle and
@@ -81,6 +104,16 @@ i2c-master-node {
/* Connect XIN input to 25MHz reference */
clocks = <&ref25m>;
clock-names = "xin";
+
+ OUT1 {
+ itd,mode = <VC5_CMOS>;
+ idt,voltage-microvolts = <1800000>;
+ idt,slew-percent = <80>;
+ };
+ OUT2 {
+ ...
+ };
+ ...
};
};