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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2016-04-01 10:52:57 +0300
committerTejun Heo <tj@kernel.org>2016-04-01 17:30:30 +0300
commit17dcc37e3e847bc0e67a5b1ec52471fcc6c18682 (patch)
treee5219e173278994cc4dc42e941237abafe16bf88 /Documentation/devicetree/bindings/ata
parent2fd0f46cb1b82587c7ae4a616d69057fb9bd0af7 (diff)
downloadlinux-17dcc37e3e847bc0e67a5b1ec52471fcc6c18682.tar.xz
ata: ahci-platform: Add ports-implemented DT bindings.
On some SOCs PORTS_IMPL register value is never programmed by the firmware and left at zero value. Which means that no sata ports are available for software. AHCI driver used to cope up with this by fabricating the port_map if the PORTS_IMPL register is read zero, but recent patch broke this workaround as zero value was valid for NVMe disks. This patch adds ports-implemented DT bindings as workaround for this issue in a way that DT can can override the PORTS_IMPL register in cases where the firmware did not program it already. Fixes: 566d1827df2e ("libata: disable forced PORTS_IMPL for >= AHCI 1.3") Cc: stable@vger.kernel.org # v4.5+ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Tejun Heo <tj@kernel.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/ata')
-rw-r--r--Documentation/devicetree/bindings/ata/ahci-platform.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 30df832a6f2f..87adfb227ca9 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -32,6 +32,10 @@ Optional properties:
- target-supply : regulator for SATA target power
- phys : reference to the SATA PHY node
- phy-names : must be "sata-phy"
+- ports-implemented : Mask that indicates which ports that the HBA supports
+ are available for software to use. Useful if PORTS_IMPL
+ is not programmed by the BIOS, which is true with
+ some embedded SOC's.
Required properties when using sub-nodes:
- #address-cells : number of cells to encode an address