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authorArnd Bergmann <arnd@arndb.de>2022-02-25 17:59:09 +0300
committerArnd Bergmann <arnd@arndb.de>2022-02-25 17:59:10 +0300
commitfee1601dc26eb1d70c46f30ba6cff591fbdb6161 (patch)
treeddafc924f22c11983cc01a8ab2ff5155d0916b30 /Documentation/devicetree/bindings/arm
parentf7bc3bc5d3eb4b135ba91ec64b3b059266709462 (diff)
parent43fd3d4d95cee85e187e5c4ef1d991f77d4d928c (diff)
downloadlinux-fee1601dc26eb1d70c46f30ba6cff591fbdb6161.tar.xz
Merge tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
Nuvoton device tree updates for 5.18 * Additions to wpcm450 following the upstremaing of the pinctrl/gpio driver for this platform * Match more of the platform in MAINTAINERS * tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki ARM: dts: wpcm450: Add pinmux information to UART0 ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons ARM: dts: wpcm450: Add pin functions ARM: dts: wpcm450: Add pinctrl and GPIO nodes ARM: dts: wpcm450: Add global control registers (GCR) node MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture dt-bindings: arm/npcm: Add binding for global control registers (GCR) Link: https://lore.kernel.org/r/CACPK8XdjF6dG04hR+iMpUP8=LSJi5x-hRivgCGDaY7o_461eJw@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
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diff --git a/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml
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+++ b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml
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+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Global Control Registers block in Nuvoton SoCs
+
+maintainers:
+ - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
+
+description:
+ The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs
+ that expose misc functionality such as chip model and version information or
+ pinmux settings.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - nuvoton,wpcm450-gcr
+ - nuvoton,npcm750-gcr
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties:
+ type: object
+
+examples:
+ - |
+ gcr: syscon@800000 {
+ compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
+ reg = <0x800000 0x1000>;
+
+ mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x38 0x07>;
+ idle-states = <2>;
+ };
+ };