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| author | Olof Johansson <olof@lixom.net> | 2018-05-25 15:07:55 +0300 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2018-05-25 15:07:55 +0300 |
| commit | d5e72aa1a5aec161d611579d216b8b0f0aacb475 (patch) | |
| tree | 3b5f7a26c1b64131aaa9d46658afe9ef923ac619 /Documentation/devicetree/bindings/arm | |
| parent | ff9da3ceae9d3b81d30fd4e81bb5366acee68b7c (diff) | |
| parent | eb8f53b6d3125894e3d825976eb7e03150496362 (diff) | |
| download | linux-d5e72aa1a5aec161d611579d216b8b0f0aacb475.tar.xz | |
Merge tag 'tegra-for-4.18-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
dt-bindings: tegra: Changes for v4.18-rc1
This contains the device tree bindings updates for the memory controller
hot resets that are implemented by driver patches in a different branch.
* tag 'tegra-for-4.18-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Relocate Tegra20 memory controller bindings
dt-bindings: arm: tegra: Document #reset-cells property of the Tegra20 MC
dt-bindings: memory: tegra: Document #reset-cells property of the Tegra30 MC
dt-bindings: arm: tegra: Remove duplicated Tegra30+ MC binding
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt | 16 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt | 18 |
2 files changed, 0 insertions, 34 deletions
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt deleted file mode 100644 index f9632bacbd04..000000000000 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt +++ /dev/null @@ -1,16 +0,0 @@ -NVIDIA Tegra20 MC(Memory Controller) - -Required properties: -- compatible : "nvidia,tegra20-mc" -- reg : Should contain 2 register ranges(address and length); see the - example below. Note that the MC registers are interleaved with the - GART registers, and hence must be represented as multiple ranges. -- interrupts : Should contain MC General interrupt. - -Example: - memory-controller@7000f000 { - compatible = "nvidia,tegra20-mc"; - reg = <0x7000f000 0x024 - 0x7000f03c 0x3c4>; - interrupts = <0 77 0x04>; - }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt deleted file mode 100644 index bdf1a612422b..000000000000 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt +++ /dev/null @@ -1,18 +0,0 @@ -NVIDIA Tegra30 MC(Memory Controller) - -Required properties: -- compatible : "nvidia,tegra30-mc" -- reg : Should contain 4 register ranges(address and length); see the - example below. Note that the MC registers are interleaved with the - SMMU registers, and hence must be represented as multiple ranges. -- interrupts : Should contain MC General interrupt. - -Example: - memory-controller { - compatible = "nvidia,tegra30-mc"; - reg = <0x7000f000 0x010 - 0x7000f03c 0x1b4 - 0x7000f200 0x028 - 0x7000f284 0x17c>; - interrupts = <0 77 0x04>; - }; |