Merge tag 'socfpga_update_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next into next/dt

Pull "arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries" From Dinh Nguyen:

5 of the 6 patches are DTS updates and the 1 patch is updating
the MAINTAINERS entry with my new email address.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'socfpga_update_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next:
  arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.
  ARM: dts: socfpga: memreserve first 4KB for future system use
  ARM: dts: socfpga: Add SD card detect
  ARM: dts: socfpga: remove extra alias in the ArriaV devkit
  ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
  MAINTAINERS: update entries for ARM/SOCFPGA platform

1 files changed, 15 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
new file mode 100644
index 000000000000..d0ce01da5c59
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
@@ -0,0 +1,15 @@
+Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
+The EDAC accesses a range of registers in the SDRAM controller.
+
+Required properties:
+- compatible : should contain "altr,sdram-edac";
+- altr,sdr-syscon : phandle of the sdr module
+- interrupts : Should contain the SDRAM ECC IRQ in the
+	appropriate format for the IRQ controller.
+
+Example:
+	sdramedac {
+		compatible = "altr,sdram-edac";
+		altr,sdr-syscon = <&sdr>;
+		interrupts = <0 39 4>;
+	};