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author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2018-03-03 21:46:59 +0300 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2018-03-16 11:10:44 +0300 |
commit | 324e46cee18739efbbed49b30a9100cb7bd0d35e (patch) | |
tree | 7da4bfdf18fbf2c6d5c1bc8f44c012aa3ad83196 /Documentation/accounting | |
parent | ae3f672cab5d1fef9fc4c6436e9d7e347eba0b13 (diff) | |
download | linux-324e46cee18739efbbed49b30a9100cb7bd0d35e.tar.xz |
dt-bindings: phy: Add support for the USB3 PHY on Amlogic Meson GXL SoCs
Amlogic Meson GXL SoCs use a dwc3 controller with two (GXM - a variant
for GXL, has three) USB2 ports. The first USB2 port supports host and
peripheral (also called "device") mode.
While the dwc3 controller has no USB3 port enabled we still need the
USB3 PHY to be initialized. Otherwise high-speed USB transfers (for
example with a USB flash drive) may time out (most often seen on boards
with mainline u-boot, where the bootloader does not initialize the USB3
PHY registers).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Yixun Lan <yixun.lan@amlogic.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/accounting')
0 files changed, 0 insertions, 0 deletions