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author | Jiri Olsa <jolsa@kernel.org> | 2016-08-18 12:09:52 +0300 |
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committer | Ingo Molnar <mingo@kernel.org> | 2016-08-18 12:58:02 +0300 |
commit | b6a32f023fcc9cbd1602f78a467fd8d41bbc9457 (patch) | |
tree | 593dec9516fdbfce9a54f83d768de107ccbddbdb | |
parent | e64cd6f73ff5a7eb4f8f759049ee24a3fe55e731 (diff) | |
download | linux-b6a32f023fcc9cbd1602f78a467fd8d41bbc9457.tar.xz |
perf/x86: Fix PEBS threshold initialization
Latest PEBS rework change could skip initialization
of the ds->pebs_interrupt_threshold for single event
PEBS threshold events.
Make sure the PEBS threshold gets always initialized.
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Fixes: 09e61b4f7849 ("perf/x86/intel: Rework the large PEBS setup code")
Link: http://lkml.kernel.org/r/1471511392-29875-1-git-send-email-jolsa@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
-rw-r--r-- | arch/x86/events/intel/ds.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index 248023f54c87..e0288d555367 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -834,14 +834,24 @@ static inline void pebs_update_threshold(struct cpu_hw_events *cpuc) static void pebs_update_state(bool needed_cb, struct cpu_hw_events *cpuc, struct pmu *pmu) { + /* + * Make sure we get updated with the first PEBS + * event. It will trigger also during removal, but + * that does not hurt: + */ + bool update = cpuc->n_pebs == 1; + if (needed_cb != pebs_needs_sched_cb(cpuc)) { if (!needed_cb) perf_sched_cb_inc(pmu); else perf_sched_cb_dec(pmu); - pebs_update_threshold(cpuc); + update = true; } + + if (update) + pebs_update_threshold(cpuc); } void intel_pmu_pebs_add(struct perf_event *event) |