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authorSascha Hauer <s.hauer@pengutronix.de>2022-04-14 19:22:41 +0300
committerMark Brown <broonie@kernel.org>2022-04-19 14:06:22 +0300
commitfb855b8d46a17c9bb5562e315158de52b18b7e62 (patch)
tree4bf9d5b867d9af0dfd84750e85067e009c052790
parent2495ba26e838176c3b572b2b1592d75b4b963692 (diff)
downloadlinux-fb855b8d46a17c9bb5562e315158de52b18b7e62.tar.xz
ASoC: fsl_micfil: use define for OSR default value
The OSR (OverSampling Rate) setting is set once to the default value and never changed throughout the driver. Nevertheless the value is read back from the register for further calculations. Just use the default value because we know what we have written. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shengjiu Wang <shengjiu.wang@gmail.com> Link: https://lore.kernel.org/r/20220414162249.3934543-14-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/fsl/fsl_micfil.c9
-rw-r--r--sound/soc/fsl/fsl_micfil.h1
2 files changed, 5 insertions, 5 deletions
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index 56df916ad55f..a35c1c580dbc 100644
--- a/sound/soc/fsl/fsl_micfil.c
+++ b/sound/soc/fsl/fsl_micfil.c
@@ -29,6 +29,8 @@
#define FSL_MICFIL_RATES SNDRV_PCM_RATE_8000_48000
#define FSL_MICFIL_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
+#define MICFIL_OSR_DEFAULT 16
+
struct fsl_micfil {
struct platform_device *pdev;
struct regmap *regmap;
@@ -112,11 +114,11 @@ static inline int get_pdm_clk(struct fsl_micfil *micfil,
unsigned int rate)
{
u32 ctrl2_reg;
- int qsel, osr;
+ int qsel;
int bclk;
+ int osr = MICFIL_OSR_DEFAULT;
regmap_read(micfil->regmap, REG_MICFIL_CTRL2, &ctrl2_reg);
- osr = 16 - FIELD_GET(MICFIL_CTRL2_CICOSR, ctrl2_reg);
qsel = FIELD_GET(MICFIL_CTRL2_QSEL, ctrl2_reg);
switch (qsel) {
@@ -282,7 +284,7 @@ static int fsl_set_clock_params(struct device *dev, unsigned int rate)
/* set CICOSR */
ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
MICFIL_CTRL2_CICOSR,
- FIELD_PREP(MICFIL_CTRL2_CICOSR, MICFIL_CTRL2_CICOSR_DEFAULT));
+ FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - MICFIL_OSR_DEFAULT));
if (ret)
return ret;
@@ -673,7 +675,6 @@ static int fsl_micfil_probe(struct platform_device *pdev)
micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0;
micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX;
-
platform_set_drvdata(pdev, micfil);
pm_runtime_enable(&pdev->dev);
diff --git a/sound/soc/fsl/fsl_micfil.h b/sound/soc/fsl/fsl_micfil.h
index 5cecae251979..08901827047d 100644
--- a/sound/soc/fsl/fsl_micfil.h
+++ b/sound/soc/fsl/fsl_micfil.h
@@ -58,7 +58,6 @@
#define MICFIL_QSEL_VLOW2_QUALITY 4
#define MICFIL_CTRL2_CICOSR GENMASK(19, 16)
-#define MICFIL_CTRL2_CICOSR_DEFAULT 0
#define MICFIL_CTRL2_CLKDIV GENMASK(7, 0)
/* MICFIL Status Register -- REG_MICFIL_STAT 0x08 */