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author | James Hogan <james.hogan@imgtec.com> | 2014-03-01 03:28:51 +0400 |
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committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-03-11 22:08:51 +0400 |
commit | f99bababe0ac3f4d6f8b0368a22600f0ba24042b (patch) | |
tree | 45995ed9d12cdd760d74c650cba258622b559012 | |
parent | 6bea25af147fcddcd8fd4557f4184c847c5c6ffd (diff) | |
download | linux-f99bababe0ac3f4d6f8b0368a22600f0ba24042b.tar.xz |
[media] dt: binding: add binding for ImgTec IR block
Add device tree binding for ImgTec Consumer Infrared block, specifically
major revision 1 of the hardware.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-rw-r--r-- | Documentation/devicetree/bindings/media/img-ir-rev1.txt | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/media/img-ir-rev1.txt b/Documentation/devicetree/bindings/media/img-ir-rev1.txt new file mode 100644 index 000000000000..5434ce61b925 --- /dev/null +++ b/Documentation/devicetree/bindings/media/img-ir-rev1.txt @@ -0,0 +1,34 @@ +* ImgTec Infrared (IR) decoder version 1 + +This binding is for Imagination Technologies' Infrared decoder block, +specifically major revision 1. + +Required properties: +- compatible: Should be "img,ir-rev1" +- reg: Physical base address of the controller and length of + memory mapped region. +- interrupts: The interrupt specifier to the cpu. + +Optional properties: +- clocks: List of clock specifiers as described in standard + clock bindings. + Up to 3 clocks may be specified in the following order: + 1st: Core clock (defaults to 32.768KHz if omitted). + 2nd: System side (fast) clock. + 3rd: Power modulation clock. +- clock-names: List of clock names corresponding to the clocks + specified in the clocks property. + Accepted clock names are: + "core": Core clock. + "sys": System clock. + "mod": Power modulation clock. + +Example: + + ir@02006200 { + compatible = "img,ir-rev1"; + reg = <0x02006200 0x100>; + interrupts = <29 4>; + clocks = <&clk_32khz>; + clock-names = "core"; + }; |