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author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-07-05 22:01:09 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-07-05 22:01:09 +0300 |
commit | 8f3f2ccf3c9eff8e80e7993f8345a4fef52567be (patch) | |
tree | 99fb20ccec9274c66b4cab5c901e8fae41c4aa55 | |
parent | b8052599420cd94505baec1f22b4e7c9e5ae5fce (diff) | |
parent | d0244847f9fc5e20df8b7483c8a4717fe0432d38 (diff) | |
download | linux-8f3f2ccf3c9eff8e80e7993f8345a4fef52567be.tar.xz |
Merge tag 'mmc-v5.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC fixes from Ulf Hansson
"MMC core:
- Clear flags before allowing to retune
MMC host:
- sdhci: Clear unused bounce buffer at DMA mmap error path
- sdhci: Fix warning message when accessing RPMB in HS400 mode
- sdhci-of-arasan: Use clock-frequency property to update clk_xin
- mtk-sd: Fixup compatible string for MT8195"
* tag 'mmc-v5.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: sdhci: Fix warning message when accessing RPMB in HS400 mode
dt-bindings: mmc: change compatiable string for MT8195 mmc host IP
mmc: sdhci: Clear unused bounce buffer at DMA mmap error path
phy: intel: Fix for warnings due to EMMC clock 175Mhz change in FIP
mmc: sdhci-of-arasan: Use clock-frequency property to update clk_xin
mmc: core: clear flags before allowing to retune
-rw-r--r-- | Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 2 | ||||
-rw-r--r-- | drivers/mmc/core/core.c | 7 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci-of-arasan.c | 14 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci.c | 10 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci.h | 1 | ||||
-rw-r--r-- | drivers/phy/intel/phy-intel-keembay-emmc.c | 3 |
6 files changed, 31 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index 4e553fd0349f..e866e985549e 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -31,6 +31,8 @@ properties: - const: mediatek,mt2701-mmc - items: - const: mediatek,mt8192-mmc + - const: mediatek,mt8183-mmc + - items: - const: mediatek,mt8195-mmc - const: mediatek,mt8183-mmc diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index b039dcff17f8..95fedcf56e4a 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -937,11 +937,14 @@ int mmc_execute_tuning(struct mmc_card *card) err = host->ops->execute_tuning(host, opcode); - if (err) + if (err) { pr_err("%s: tuning execution failed: %d\n", mmc_hostname(host), err); - else + } else { + host->retune_now = 0; + host->need_retune = 0; mmc_retune_enable(host); + } return err; } diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 839965f7c717..0e7c07ed9690 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -1542,6 +1542,8 @@ static int sdhci_arasan_probe(struct platform_device *pdev) } } + sdhci_get_of_property(pdev); + sdhci_arasan->clk_ahb = devm_clk_get(dev, "clk_ahb"); if (IS_ERR(sdhci_arasan->clk_ahb)) { ret = dev_err_probe(dev, PTR_ERR(sdhci_arasan->clk_ahb), @@ -1561,14 +1563,22 @@ static int sdhci_arasan_probe(struct platform_device *pdev) goto err_pltfm_free; } + /* If clock-frequency property is set, use the provided value */ + if (pltfm_host->clock && + pltfm_host->clock != clk_get_rate(clk_xin)) { + ret = clk_set_rate(clk_xin, pltfm_host->clock); + if (ret) { + dev_err(&pdev->dev, "Failed to set SD clock rate\n"); + goto clk_dis_ahb; + } + } + ret = clk_prepare_enable(clk_xin); if (ret) { dev_err(dev, "Unable to enable SD clock.\n"); goto clk_dis_ahb; } - sdhci_get_of_property(pdev); - if (of_property_read_bool(np, "xlnx,fails-without-test-cd")) sdhci_arasan->quirks |= SDHCI_ARASAN_QUIRK_FORCE_CDTEST; diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 6aaf5c3ce34c..aba6e10b8605 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1812,6 +1812,10 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host) u16 preset = 0; switch (host->timing) { + case MMC_TIMING_MMC_HS: + case MMC_TIMING_SD_HS: + preset = sdhci_readw(host, SDHCI_PRESET_FOR_HIGH_SPEED); + break; case MMC_TIMING_UHS_SDR12: preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR12); break; @@ -4072,9 +4076,13 @@ static void sdhci_allocate_bounce_buffer(struct sdhci_host *host) bounce_size, DMA_BIDIRECTIONAL); ret = dma_mapping_error(mmc_dev(mmc), host->bounce_addr); - if (ret) + if (ret) { + devm_kfree(mmc_dev(mmc), host->bounce_buffer); + host->bounce_buffer = NULL; /* Again fall back to max_segs == 1 */ return; + } + host->bounce_buffer_size = bounce_size; /* Lie about this since we're bouncing */ diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index c35ed4be75b7..074dc182b184 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -255,6 +255,7 @@ /* 60-FB reserved */ +#define SDHCI_PRESET_FOR_HIGH_SPEED 0x64 #define SDHCI_PRESET_FOR_SDR12 0x66 #define SDHCI_PRESET_FOR_SDR25 0x68 #define SDHCI_PRESET_FOR_SDR50 0x6A diff --git a/drivers/phy/intel/phy-intel-keembay-emmc.c b/drivers/phy/intel/phy-intel-keembay-emmc.c index eb7c635ed89a..0eb11ac7c2e2 100644 --- a/drivers/phy/intel/phy-intel-keembay-emmc.c +++ b/drivers/phy/intel/phy-intel-keembay-emmc.c @@ -95,7 +95,8 @@ static int keembay_emmc_phy_power(struct phy *phy, bool on_off) else freqsel = 0x0; - if (mhz < 50 || mhz > 200) + /* Check for EMMC clock rate*/ + if (mhz > 175) dev_warn(&phy->dev, "Unsupported rate: %d MHz\n", mhz); /* |