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| author | Oded Gabbay <oded.gabbay@gmail.com> | 2020-08-12 10:46:33 +0300 |
|---|---|---|
| committer | Oded Gabbay <oded.gabbay@gmail.com> | 2020-09-22 18:49:50 +0300 |
| commit | a0e072f5a18ffa04f83669a886dc4a4cfc3a1341 (patch) | |
| tree | b181a1ad5debe70dda07c0a3c3ca0f119c031a18 | |
| parent | bd4ef3729213280522694ff714e28192e486487d (diff) | |
| download | linux-a0e072f5a18ffa04f83669a886dc4a4cfc3a1341.tar.xz | |
habanalabs: use standard BIT() and GENMASK()
Use the standard macros to define bitmasks.
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Tomer Tayar <ttayar@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
| -rw-r--r-- | drivers/misc/habanalabs/gaudi/gaudiP.h | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/drivers/misc/habanalabs/gaudi/gaudiP.h b/drivers/misc/habanalabs/gaudi/gaudiP.h index 82137c3f3e2e..1368f6298c80 100644 --- a/drivers/misc/habanalabs/gaudi/gaudiP.h +++ b/drivers/misc/habanalabs/gaudi/gaudiP.h @@ -142,28 +142,28 @@ #define VA_HOST_SPACE_SIZE (VA_HOST_SPACE_END - \ VA_HOST_SPACE_START) /* 767TB */ -#define HW_CAP_PLL 0x00000001 -#define HW_CAP_HBM 0x00000002 -#define HW_CAP_MMU 0x00000004 -#define HW_CAP_MME 0x00000008 -#define HW_CAP_CPU 0x00000010 -#define HW_CAP_PCI_DMA 0x00000020 -#define HW_CAP_MSI 0x00000040 -#define HW_CAP_CPU_Q 0x00000080 -#define HW_CAP_HBM_DMA 0x00000100 -#define HW_CAP_CLK_GATE 0x00000200 -#define HW_CAP_SRAM_SCRAMBLER 0x00000400 -#define HW_CAP_HBM_SCRAMBLER 0x00000800 - -#define HW_CAP_TPC0 0x01000000 -#define HW_CAP_TPC1 0x02000000 -#define HW_CAP_TPC2 0x04000000 -#define HW_CAP_TPC3 0x08000000 -#define HW_CAP_TPC4 0x10000000 -#define HW_CAP_TPC5 0x20000000 -#define HW_CAP_TPC6 0x40000000 -#define HW_CAP_TPC7 0x80000000 -#define HW_CAP_TPC_MASK 0xFF000000 +#define HW_CAP_PLL BIT(0) +#define HW_CAP_HBM BIT(1) +#define HW_CAP_MMU BIT(2) +#define HW_CAP_MME BIT(3) +#define HW_CAP_CPU BIT(4) +#define HW_CAP_PCI_DMA BIT(5) +#define HW_CAP_MSI BIT(6) +#define HW_CAP_CPU_Q BIT(7) +#define HW_CAP_HBM_DMA BIT(8) +#define HW_CAP_CLK_GATE BIT(9) +#define HW_CAP_SRAM_SCRAMBLER BIT(10) +#define HW_CAP_HBM_SCRAMBLER BIT(11) + +#define HW_CAP_TPC0 BIT(24) +#define HW_CAP_TPC1 BIT(25) +#define HW_CAP_TPC2 BIT(26) +#define HW_CAP_TPC3 BIT(27) +#define HW_CAP_TPC4 BIT(28) +#define HW_CAP_TPC5 BIT(29) +#define HW_CAP_TPC6 BIT(30) +#define HW_CAP_TPC7 BIT(31) +#define HW_CAP_TPC_MASK GENMASK(31, 24) #define HW_CAP_TPC_SHIFT 24 #define GAUDI_CPU_PCI_MSB_ADDR(addr) (((addr) & GENMASK_ULL(49, 39)) >> 39) |