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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2025-04-03 12:19:13 +0300 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2025-04-29 12:01:58 +0300 |
| commit | 2a294fa215289aff4b7b0c0a70f24dcd621df497 (patch) | |
| tree | 9276d62bb01dc2290de3e5a0bbb266fbb15776cd | |
| parent | d54e34c58aa224bdd0b9ea0f429c5a90d91db2c7 (diff) | |
| download | linux-2a294fa215289aff4b7b0c0a70f24dcd621df497.tar.xz | |
mtd: spinand: Use more specific naming for the read ID op
SPI operations have been initially described through macros implicitly
implying the use of a single SPI SDR bus. Macros for supporting dual and
quad I/O transfers have been added on top, generally inspired by vendor
naming, followed by DTR operations. Soon we might see octal
and even octal DTR operations as well (including the opcode byte).
Let's clarify what the macro really means by describing the expected bus
topology in the read ID macro name.
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| -rw-r--r-- | drivers/mtd/nand/spi/core.c | 2 | ||||
| -rw-r--r-- | include/linux/mtd/spinand.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index e1c397177eee..40bd4fe996f2 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -583,7 +583,7 @@ out: static int spinand_read_id_op(struct spinand_device *spinand, u8 naddr, u8 ndummy, u8 *buf) { - struct spi_mem_op op = SPINAND_READID_OP( + struct spi_mem_op op = SPINAND_READID_1S_1S_1S_OP( naddr, ndummy, spinand->scratchbuf, SPINAND_MAX_ID_LEN); int ret; diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 87d8f9f2017e..dfb5c74cad6d 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -32,7 +32,7 @@ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) -#define SPINAND_READID_OP(naddr, ndummy, buf, len) \ +#define SPINAND_READID_1S_1S_1S_OP(naddr, ndummy, buf, len) \ SPI_MEM_OP(SPI_MEM_OP_CMD(0x9f, 1), \ SPI_MEM_OP_ADDR(naddr, 0, 1), \ SPI_MEM_OP_DUMMY(ndummy, 1), \ |