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| author | Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-02-13 19:32:31 +0300 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-02-14 13:40:38 +0300 |
| commit | afe8e5a90037dd59edcffcccad2a247a912a337a (patch) | |
| tree | a9ea37be97ee75c7815972ce87138c31753da4f7 | |
| parent | a7cbf0b2d9c2f7d549da0834599fdba28245d6dd (diff) | |
| download | linux-afe8e5a90037dd59edcffcccad2a247a912a337a.tar.xz | |
ARM64: dts: marvell: armada-cp110: Add registers clock for I2C nodes
This extra clock is needed to access the registers of the I2C controller
used on the Armada 7K/8K SoCs.
This follows the changes already made in the binding documentation (as
well as in the driver) in:
commit 1534156e999735fe0befad958e1447600c0c20e7 ("i2c: mv64xxx: Fix clock
resource by adding an optional bus clock")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi index 0ab921861a2f..c57bf6661622 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi @@ -280,7 +280,9 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <ICU_GRP_NSR 120 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CP110_LABEL(clk) 1 21>; + clock-names = "core", "reg"; + clocks = <&CP110_LABEL(clk) 1 21>, + <&CP110_LABEL(clk) 1 17>; status = "disabled"; }; @@ -290,7 +292,9 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <ICU_GRP_NSR 121 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CP110_LABEL(clk) 1 21>; + clock-names = "core", "reg"; + clocks = <&CP110_LABEL(clk) 1 21>, + <&CP110_LABEL(clk) 1 17>; status = "disabled"; }; |