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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-09-27 14:38:24 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-11-06 05:47:56 +0300 |
| commit | e3c4471263f25620b169d4317202cbf70d7fa8c6 (patch) | |
| tree | 286a6564cdcc2b4055d8ef017a4d100060ac8faf | |
| parent | 7da54ced3a79ffaa687d99a4b7bfb7591202de9a (diff) | |
| download | linux-e3c4471263f25620b169d4317202cbf70d7fa8c6.tar.xz | |
dt-bindings: clock: qcom,gcc-ipq8064: add pll4 to used clocks
On IPQ8064 (and related platforms) the GCC uses PLL4 clock provided by
the LCC clock controller. Mention this in the bindings.
To remain compatible with older bindings, make it optional, as the
driver will fallback to getting the `pll4' clock from the system clocks
list.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927113826.246241-2-dmitry.baryshkov@linaro.org
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml index 9eb91dd22557..d1f93ee9ff69 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml @@ -27,14 +27,18 @@ properties: - const: syscon clocks: + minItems: 2 items: - description: PXO source - description: CXO source + - description: PLL4 from LCC clock-names: + minItems: 2 items: - const: pxo - const: cxo + - const: pll4 thermal-sensor: type: object @@ -51,13 +55,14 @@ unevaluatedProperties: false examples: - | + #include <dt-bindings/clock/qcom,lcc-ipq806x.h> #include <dt-bindings/interrupt-controller/arm-gic.h> gcc: clock-controller@900000 { compatible = "qcom,gcc-ipq8064", "syscon"; reg = <0x00900000 0x4000>; - clocks = <&pxo_board>, <&cxo_board>; - clock-names = "pxo", "cxo"; + clocks = <&pxo_board>, <&cxo_board>, <&lcc PLL4>; + clock-names = "pxo", "cxo", "pll4"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; |