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author | Chris Brandt <chris.brandt@renesas.com> | 2016-09-02 04:40:10 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2016-09-05 15:32:39 +0300 |
commit | 969244f9c72057b2c32b650b2d75a04d612c603c (patch) | |
tree | f95bc55c3b36f85ce4fdcb57ca7eff64c493873b | |
parent | e83c05a7160681f554476e9d44b7b77053efc21a (diff) | |
download | linux-969244f9c72057b2c32b650b2d75a04d612c603c.tar.xz |
ARM: dts: r7s72100: add ethernet clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 9 | ||||
-rw-r--r-- | include/dt-bindings/clock/r7s72100-clock.h | 3 |
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index e8e2a5d71976..6d29e8ffa0d9 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -108,6 +108,15 @@ clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7"; }; + mstp7_clks: mstp7_clks@fcfe0430 { + #clock-cells = <1>; + compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0xfcfe0430 4>; + clocks = <&p0_clk>; + clock-indices = <R7S72100_CLK_ETHER>; + clock-output-names = "ether"; + }; + mstp9_clks: mstp9_clks@fcfe0438 { #clock-cells = <1>; compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h index 5128f4d94f44..3cd813896d08 100644 --- a/include/dt-bindings/clock/r7s72100-clock.h +++ b/include/dt-bindings/clock/r7s72100-clock.h @@ -25,6 +25,9 @@ #define R7S72100_CLK_SCIF6 1 #define R7S72100_CLK_SCIF7 0 +/* MSTP7 */ +#define R7S72100_CLK_ETHER 4 + /* MSTP9 */ #define R7S72100_CLK_I2C0 7 #define R7S72100_CLK_I2C1 6 |