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| author | Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> | 2014-12-11 06:21:14 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2014-12-21 13:07:20 +0300 |
| commit | 3281480b70ceb9889b71f7b8a7bf54db3c05d40e (patch) | |
| tree | 98124437205f1c2f1c254944f91f6d2cbe3a729c | |
| parent | cbf41168339adcb48de6a3537f88d4e85285db99 (diff) | |
| download | linux-3281480b70ceb9889b71f7b8a7bf54db3c05d40e.tar.xz | |
ARM: shmobile: r8a7794: Add QSPI clock to device tree
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
[horms: omitted device node and alias; only add clock]
[horms: use clock-indicies instead of renesas,clock-indicies]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm/boot/dts/r8a7794.dtsi | 8 | ||||
| -rw-r--r-- | include/dt-bindings/clock/r8a7794-clock.h | 1 |
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 6d95638987e7..068ca0981ac9 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -535,6 +535,14 @@ clock-output-names = "vin1", "vin0", "ether"; }; + mstp9_clks: mstp9_clks@e6150994 { + compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; + clocks = <&cpg_clocks R8A7794_CLK_QSPI>; + #clock-cells = <1>; + clock-indices = <R8A7794_CLK_QSPI_MOD>; + clock-output-names = "qspi_mod"; + }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index c0bd14a5c6f3..fba89a49e815 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -86,6 +86,7 @@ #define R8A7794_CLK_GPIO2 10 #define R8A7794_CLK_GPIO1 11 #define R8A7794_CLK_GPIO0 12 +#define R8A7794_CLK_QSPI_MOD 17 /* MSTP11 */ #define R8A7794_CLK_SCIFA3 6 |