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author | Arnd Bergmann <arnd@arndb.de> | 2023-04-14 18:47:14 +0300 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2023-04-14 18:47:14 +0300 |
commit | 2925732f0c5cf69fdd503ef42b9c8293480d0cab (patch) | |
tree | 810256f7e62576479ee751a550b07ca6bb191c9d | |
parent | ff68e816856383c2a31f45a94d5b55f18e90de03 (diff) | |
parent | 95e2ac6ae9f2330557a6aef70bf15173e1dd9714 (diff) | |
download | linux-2925732f0c5cf69fdd503ef42b9c8293480d0cab.tar.xz |
Merge tag 'v6.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
MMC-aliases for rk3288-veyron devices and some dts node adaptions
for yaml conversions recently merged into the drm tree.
* tag 'v6.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: fix rk3288 dp node
ARM: dts: rockchip: fix rk3288 lvds node
ARM: dts: rockchip: fix rk3288 dsi node
ARM: dts: rockchip: Add mmc aliases for rk3288-veyron devices
Link: https://lore.kernel.org/r/9713202.NyiUUSuA9g@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/rk3288-veyron.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 27 |
3 files changed, 34 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi index 27fb06ce907e..8b58773e592e 100644 --- a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi @@ -5,6 +5,12 @@ * Copyright 2015 Google, Inc */ +/ { + aliases { + mmc1 = &sdmmc; + }; +}; + &io_domains { sdcard-supply = <&vccio_sd>; }; diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index e406c8c7c7e5..d838bf0d5d9a 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -10,6 +10,10 @@ #include "rk3288.dtsi" / { + aliases { + mmc0 = &emmc; + }; + chosen { stdout-path = "serial2:115200n8"; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2ca76b69add7..2fa7fdc60d27 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1114,7 +1114,7 @@ status = "disabled"; }; - mipi_dsi: mipi@ff960000 { + mipi_dsi: dsi@ff960000 { compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; reg = <0x0 0xff960000 0x0 0x4000>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; @@ -1125,18 +1125,28 @@ status = "disabled"; ports { - mipi_in: port { + #address-cells = <1>; + #size-cells = <0>; + + mipi_in: port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; + mipi_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_mipi>; }; + mipi_in_vopl: endpoint@1 { reg = <1>; remote-endpoint = <&vopl_out_mipi>; }; }; + + mipi_out: port@1 { + reg = <1>; + }; }; }; @@ -1157,7 +1167,6 @@ lvds_in: port@0 { reg = <0>; - #address-cells = <1>; #size-cells = <0>; @@ -1165,11 +1174,16 @@ reg = <0>; remote-endpoint = <&vopb_out_lvds>; }; + lvds_in_vopl: endpoint@1 { reg = <1>; remote-endpoint = <&vopl_out_lvds>; }; }; + + lvds_out: port@1 { + reg = <1>; + }; }; }; @@ -1190,19 +1204,26 @@ ports { #address-cells = <1>; #size-cells = <0>; + edp_in: port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; + edp_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_edp>; }; + edp_in_vopl: endpoint@1 { reg = <1>; remote-endpoint = <&vopl_out_edp>; }; }; + + edp_out: port@1 { + reg = <1>; + }; }; }; |