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| author | Borislav Petkov <borislav.petkov@amd.com> | 2011-02-21 21:33:10 +0300 |
|---|---|---|
| committer | Borislav Petkov <borislav.petkov@amd.com> | 2011-03-17 16:46:30 +0300 |
| commit | 151fa71c581d1295f3f44f4882ceb17ca014dc8d (patch) | |
| tree | b5987d55156426eec04a85af5b300a1a30c7cd36 | |
| parent | b487c33e55eb7e18cd98094f7159c6d9e8b6bedd (diff) | |
| download | linux-151fa71c581d1295f3f44f4882ceb17ca014dc8d.tar.xz | |
amd64_edac: Fix DRAM base macros
Return unsigned u8 values only.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| -rw-r--r-- | drivers/edac/amd64_edac.c | 3 | ||||
| -rw-r--r-- | drivers/edac/amd64_edac.h | 8 |
2 files changed, 5 insertions, 6 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 8d9def57232b..e6adc73e70ca 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -621,7 +621,6 @@ static u64 input_addr_to_dram_addr(struct mem_ctl_info *mci, u64 input_addr) BUG_ON(node_id > 7); intlv_shift = num_node_interleave_bits(dram_intlv_en(pvt, 0)); - if (intlv_shift == 0) { debugf1(" InputAddr 0x%lx translates to DramAddr of " "same value\n", (unsigned long)input_addr); @@ -1192,7 +1191,7 @@ static void read_dram_ctl_register(struct amd64_pvt *pvt) static u8 f1x_determine_channel(struct amd64_pvt *pvt, u64 sys_addr, bool hi_range_sel, u8 intlv_en) { - u32 dct_sel_high = (pvt->dct_sel_lo >> 1) & 1; + u8 dct_sel_high = (pvt->dct_sel_lo >> 1) & 1; if (dct_ganging_enabled(pvt)) return 0; diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 6220baeb3f1a..11be36a311eb 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -180,10 +180,10 @@ #define DRAM_BASE_LO 0x40 #define DRAM_LIMIT_LO 0x44 -#define dram_intlv_en(pvt, i) ((pvt->ranges[i].base.lo >> 8) & 0x7) -#define dram_rw(pvt, i) (pvt->ranges[i].base.lo & 0x3) -#define dram_intlv_sel(pvt, i) ((pvt->ranges[i].lim.lo >> 8) & 0x7) -#define dram_dst_node(pvt, i) (pvt->ranges[i].lim.lo & 0x7) +#define dram_intlv_en(pvt, i) ((u8)((pvt->ranges[i].base.lo >> 8) & 0x7)) +#define dram_rw(pvt, i) ((u8)(pvt->ranges[i].base.lo & 0x3)) +#define dram_intlv_sel(pvt, i) ((u8)((pvt->ranges[i].lim.lo >> 8) & 0x7)) +#define dram_dst_node(pvt, i) ((u8)(pvt->ranges[i].lim.lo & 0x7)) #define DHAR 0xf0 #define dhar_valid(pvt) ((pvt)->dhar & BIT(0)) |