diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2011-12-10 04:09:49 +0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-12-10 04:10:29 +0400 |
commit | 332ceddb8c4ba2367abcb9a94a69386b2785441b (patch) | |
tree | b3288bcda95b165172b13e7a8ad2f2c1947b9953 | |
parent | a36ae95c4e220afb976dd9d0d813d01e882b7b59 (diff) | |
parent | aaa0ef289afe9186f81e2340114ea413eef0492a (diff) | |
download | linux-332ceddb8c4ba2367abcb9a94a69386b2785441b.tar.xz |
Merge branch 'for-usb' of git://git.kernel.org/pub/scm/linux/kernel/git/geoff/ps3-linux into usb-next
* 'for-usb' of git://git.kernel.org/pub/scm/linux/kernel/git/geoff/ps3-linux:
usb: PS3 EHCI QH read work-around
usb: Fix PS3 EHCI suspend
usb: PS3 EHCI HC reset work-around
usb: Remove ehci_reset call from ehci_run
-rw-r--r-- | drivers/usb/host/ehci-au1xxx.c | 1 | ||||
-rw-r--r-- | drivers/usb/host/ehci-hcd.c | 62 | ||||
-rw-r--r-- | drivers/usb/host/ehci-octeon.c | 2 | ||||
-rw-r--r-- | drivers/usb/host/ehci-omap.c | 2 | ||||
-rw-r--r-- | drivers/usb/host/ehci-ps3.c | 30 | ||||
-rw-r--r-- | drivers/usb/host/ehci-s5p.c | 2 | ||||
-rw-r--r-- | drivers/usb/host/ehci-vt8500.c | 2 | ||||
-rw-r--r-- | drivers/usb/host/ehci-w90x900.c | 2 |
8 files changed, 93 insertions, 10 deletions
diff --git a/drivers/usb/host/ehci-au1xxx.c b/drivers/usb/host/ehci-au1xxx.c index 18bafa99fe57..bf7441afed16 100644 --- a/drivers/usb/host/ehci-au1xxx.c +++ b/drivers/usb/host/ehci-au1xxx.c @@ -23,6 +23,7 @@ static int au1xxx_ehci_setup(struct usb_hcd *hcd) int ret = ehci_init(hcd); ehci->need_io_watchdog = 0; + ehci_reset(ehci); return ret; } diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 0f15d392aae1..c4c76ab204c1 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -48,6 +48,10 @@ #include <asm/system.h> #include <asm/unaligned.h> +#if defined(CONFIG_PPC_PS3) +#include <asm/firmware.h> +#endif + /*-------------------------------------------------------------------------*/ /* @@ -230,12 +234,58 @@ static int ehci_halt (struct ehci_hcd *ehci) STS_HALT, STS_HALT, 16 * 125); } +#if defined(CONFIG_USB_SUSPEND) && defined(CONFIG_PPC_PS3) + +/* + * The EHCI controller of the Cell Super Companion Chip used in the + * PS3 will stop the root hub after all root hub ports are suspended. + * When in this condition handshake will return -ETIMEDOUT. The + * STS_HLT bit will not be set, so inspection of the frame index is + * used here to test for the condition. If the condition is found + * return success to allow the USB suspend to complete. + */ + +static int handshake_for_broken_root_hub(struct ehci_hcd *ehci, + void __iomem *ptr, u32 mask, u32 done, + int usec) +{ + unsigned int old_index; + int error; + + if (!firmware_has_feature(FW_FEATURE_PS3_LV1)) + return -ETIMEDOUT; + + old_index = ehci_read_frame_index(ehci); + + error = handshake(ehci, ptr, mask, done, usec); + + if (error == -ETIMEDOUT && ehci_read_frame_index(ehci) == old_index) + return 0; + + return error; +} + +#else + +static int handshake_for_broken_root_hub(struct ehci_hcd *ehci, + void __iomem *ptr, u32 mask, u32 done, + int usec) +{ + return -ETIMEDOUT; +} + +#endif + static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr, u32 mask, u32 done, int usec) { int error; error = handshake(ehci, ptr, mask, done, usec); + if (error == -ETIMEDOUT) + error = handshake_for_broken_root_hub(ehci, ptr, mask, done, + usec); + if (error) { ehci_halt(ehci); ehci->rh_state = EHCI_RH_HALTED; @@ -620,6 +670,7 @@ static int ehci_init(struct usb_hcd *hcd) hw = ehci->async->hw; hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma); hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD); + hw->hw_info1 |= cpu_to_hc32(ehci, (1 << 7)); /* I = 1 */ hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); hw->hw_qtd_next = EHCI_LIST_END(ehci); ehci->async->qh_state = QH_STATE_LINKED; @@ -677,22 +728,13 @@ static int ehci_init(struct usb_hcd *hcd) static int ehci_run (struct usb_hcd *hcd) { struct ehci_hcd *ehci = hcd_to_ehci (hcd); - int retval; u32 temp; u32 hcc_params; hcd->uses_new_polling = 1; /* EHCI spec section 4.1 */ - /* - * TDI driver does the ehci_reset in their reset callback. - * Don't reset here, because configuration settings will - * vanish. - */ - if (!ehci_is_TDI(ehci) && (retval = ehci_reset(ehci)) != 0) { - ehci_mem_cleanup(ehci); - return retval; - } + ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); diff --git a/drivers/usb/host/ehci-octeon.c b/drivers/usb/host/ehci-octeon.c index ba1f51361134..c0104882c72d 100644 --- a/drivers/usb/host/ehci-octeon.c +++ b/drivers/usb/host/ehci-octeon.c @@ -155,6 +155,8 @@ static int ehci_octeon_drv_probe(struct platform_device *pdev) /* cache this readonly data; minimize chip reads */ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); + ehci_reset(ehci); + ret = usb_add_hcd(hcd, irq, IRQF_SHARED); if (ret) { dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret); diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index e39b0297bad1..e33baf9052cb 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -228,6 +228,8 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) /* cache this readonly data; minimize chip reads */ omap_ehci->hcs_params = readl(&omap_ehci->caps->hcs_params); + ehci_reset(omap_ehci); + ret = usb_add_hcd(hcd, irq, IRQF_SHARED); if (ret) { dev_err(dev, "failed to add hcd with err %d\n", ret); diff --git a/drivers/usb/host/ehci-ps3.c b/drivers/usb/host/ehci-ps3.c index 2dc32da75cfc..a20e496eb479 100644 --- a/drivers/usb/host/ehci-ps3.c +++ b/drivers/usb/host/ehci-ps3.c @@ -21,6 +21,34 @@ #include <asm/firmware.h> #include <asm/ps3.h> +static void ps3_ehci_setup_insnreg(struct ehci_hcd *ehci) +{ + /* PS3 HC internal setup register offsets. */ + + enum ps3_ehci_hc_insnreg { + ps3_ehci_hc_insnreg01 = 0x084, + ps3_ehci_hc_insnreg02 = 0x088, + ps3_ehci_hc_insnreg03 = 0x08c, + }; + + /* PS3 EHCI HC errata fix 316 - The PS3 EHCI HC will reset its + * internal INSNREGXX setup regs back to the chip default values + * on Host Controller Reset (CMD_RESET) or Light Host Controller + * Reset (CMD_LRESET). The work-around for this is for the HC + * driver to re-initialise these regs when ever the HC is reset. + */ + + /* Set burst transfer counts to 256 out, 32 in. */ + + writel_be(0x01000020, (void __iomem *)ehci->regs + + ps3_ehci_hc_insnreg01); + + /* Enable burst transfer counts. */ + + writel_be(0x00000001, (void __iomem *)ehci->regs + + ps3_ehci_hc_insnreg03); +} + static int ps3_ehci_hc_reset(struct usb_hcd *hcd) { int result; @@ -49,6 +77,8 @@ static int ps3_ehci_hc_reset(struct usb_hcd *hcd) ehci_reset(ehci); + ps3_ehci_setup_insnreg(ehci); + return result; } diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c index 8aac02019195..293f7412992e 100644 --- a/drivers/usb/host/ehci-s5p.c +++ b/drivers/usb/host/ehci-s5p.c @@ -134,6 +134,8 @@ static int __devinit s5p_ehci_probe(struct platform_device *pdev) /* cache this readonly data; minimize chip reads */ ehci->hcs_params = readl(&ehci->caps->hcs_params); + ehci_reset(ehci); + err = usb_add_hcd(hcd, irq, IRQF_SHARED); if (err) { dev_err(&pdev->dev, "Failed to add USB HCD\n"); diff --git a/drivers/usb/host/ehci-vt8500.c b/drivers/usb/host/ehci-vt8500.c index 54d1ab8aec49..c1eda73916cd 100644 --- a/drivers/usb/host/ehci-vt8500.c +++ b/drivers/usb/host/ehci-vt8500.c @@ -132,6 +132,8 @@ static int vt8500_ehci_drv_probe(struct platform_device *pdev) ehci_port_power(ehci, 1); + ehci_reset(ehci); + ret = usb_add_hcd(hcd, pdev->resource[1].start, IRQF_SHARED); if (ret == 0) { diff --git a/drivers/usb/host/ehci-w90x900.c b/drivers/usb/host/ehci-w90x900.c index d661cf7de140..3d2e26cbb34c 100644 --- a/drivers/usb/host/ehci-w90x900.c +++ b/drivers/usb/host/ehci-w90x900.c @@ -78,6 +78,8 @@ static int __devinit usb_w90x900_probe(const struct hc_driver *driver, if (irq < 0) goto err4; + ehci_reset(ehci); + retval = usb_add_hcd(hcd, irq, IRQF_SHARED); if (retval != 0) goto err4; |