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| author | Thor Thayer <tthayer@opensource.altera.com> | 2016-03-31 21:48:04 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2016-04-02 14:49:07 +0300 |
| commit | abd56b3c8483ca73413ade0e7c7a0d13b9870016 (patch) | |
| tree | 311758196caf597b436e43245ce2a255f30f6520 | |
| parent | aa1f06dcc0e58e1a1b5118fc265418a2970e11aa (diff) | |
| download | linux-abd56b3c8483ca73413ade0e7c7a0d13b9870016.tar.xz | |
Documentation: dt: socfpga: Add Altera Arria10 OCRAM binding
Add the device tree bindings needed to support the Altera On-Chip
RAM ECC on the Arria10 chip.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1459450087-24792-5-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
| -rw-r--r-- | Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt index 37ff9bfea5f4..5a6b16070a33 100644 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt @@ -71,6 +71,11 @@ Required Properties: - compatible : Should be "altr,socfpga-a10-l2-ecc" - reg : Address and size for ECC error interrupt clear registers. +On-Chip RAM ECC +Required Properties: +- compatible : Should be "altr,socfpga-a10-ocram-ecc" +- reg : Address and size for ECC block registers. + Example: eccmgr: eccmgr@ffd06000 { @@ -86,4 +91,9 @@ Example: compatible = "altr,socfpga-a10-l2-ecc"; reg = <0xffd06010 0x4>; }; + + ocram-ecc@ff8c3000 { + compatible = "altr,socfpga-a10-ocram-ecc"; + reg = <0xff8c3000 0x90>; + }; }; |