diff options
| author | Thinh Nguyen <Thinh.Nguyen@synopsys.com> | 2022-04-22 05:33:56 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-05-09 10:14:29 +0300 |
| commit | 7d14c96bff097ed67687a73fe4b5614a73910ac2 (patch) | |
| tree | a7c4617cde95be21e5a40bc56d7dec35195e7330 | |
| parent | 5d8299ead7c56053ffceecb350f119a27973bf51 (diff) | |
| download | linux-7d14c96bff097ed67687a73fe4b5614a73910ac2.tar.xz | |
usb: dwc3: core: Only handle soft-reset in DCTL
commit f4fd84ae0765a80494b28c43b756a95100351a94 upstream.
Make sure not to set run_stop bit or link state change request while
initiating soft-reset. Register read-modify-write operation may
unintentionally start the controller before the initialization completes
with its previous DCTL value, which can cause initialization failure.
Fixes: f59dcab17629 ("usb: dwc3: core: improve reset sequence")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/6aecbd78328f102003d40ccf18ceeebd411d3703.1650594792.git.Thinh.Nguyen@synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/usb/dwc3/core.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 951d02b864bb..5cb1350ec66d 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -275,7 +275,8 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc) reg = dwc3_readl(dwc->regs, DWC3_DCTL); reg |= DWC3_DCTL_CSFTRST; - dwc3_writel(dwc->regs, DWC3_DCTL, reg); + reg &= ~DWC3_DCTL_RUN_STOP; + dwc3_gadget_dctl_write_safe(dwc, reg); /* * For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit |