summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>2018-02-02 16:43:35 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-06-16 14:00:51 +0300
commitd14cee8b6c2ff42a233921f9c7f2a8bc0025fad9 (patch)
tree6534800af4496b90c5018e01e9171bce8619321f
parent761fd846a24a436943502bdb136e397d9ce3bfc9 (diff)
downloadlinux-d14cee8b6c2ff42a233921f9c7f2a8bc0025fad9.tar.xz
x86/cpu: Add Cannonlake to Intel family
commit 850eb9fba3711e98bafebde26675d9c082c0ff48 upstream. Add CPUID of Cannonlake (CNL) processors to Intel family list. Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: x86@kernel.org Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Suggested-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Megha Dey <megha.dey@linux.intel.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--arch/x86/include/asm/intel-family.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 360e67943a77..3e8730a337a7 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -9,6 +9,10 @@
*
* Things ending in "2" are usually because we have no better
* name for them. There's no processor called "SILVERMONT2".
+ *
+ * While adding a new CPUID for a new microarchitecture, add a new
+ * group to keep logically sorted out in chronological order. Within
+ * that group keep the CPUID for the variants sorted by model number.
*/
#define INTEL_FAM6_CORE_YONAH 0x0E
@@ -48,6 +52,8 @@
#define INTEL_FAM6_KABYLAKE_MOBILE 0x8E
#define INTEL_FAM6_KABYLAKE_DESKTOP 0x9E
+#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66
+
/* "Small Core" Processors (Atom) */
#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */