diff options
| author | Wei WANG <wei_wang@realsil.com.cn> | 2013-08-20 10:18:53 +0400 |
|---|---|---|
| committer | Samuel Ortiz <sameo@linux.intel.com> | 2013-08-20 12:22:00 +0400 |
| commit | 7140812c4a3676e834bc2ed587be441afba04e18 (patch) | |
| tree | 909e271fdec86b71028d78576621855f9c5a0247 | |
| parent | 5947c167d145f32d4475d647a87e2af2699efe45 (diff) | |
| download | linux-7140812c4a3676e834bc2ed587be441afba04e18.tar.xz | |
mfd: rtsx: Move some actions from rtsx_pci_init_hw to individual extra_init_hw
These actions are individual for each reader model, so should be put in
extra_init_hw instead of rtsx_pci_init_hw.
Signed-off-by: Wei WANG <wei_wang@realsil.com.cn>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
| -rw-r--r-- | drivers/mfd/rts5209.c | 4 | ||||
| -rw-r--r-- | drivers/mfd/rts5227.c | 2 | ||||
| -rw-r--r-- | drivers/mfd/rts5229.c | 4 | ||||
| -rw-r--r-- | drivers/mfd/rts5249.c | 2 | ||||
| -rw-r--r-- | drivers/mfd/rtsx_pcr.c | 4 |
5 files changed, 12 insertions, 4 deletions
diff --git a/drivers/mfd/rts5209.c b/drivers/mfd/rts5209.c index c67935efd4f5..03a15f779ebb 100644 --- a/drivers/mfd/rts5209.c +++ b/drivers/mfd/rts5209.c @@ -70,6 +70,10 @@ static int rts5209_extra_init_hw(struct rtsx_pcr *pcr) /* Turn off LED */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03); + /* Reset ASPM state to default value */ + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); + /* Force CLKREQ# PIN to drive 0 to request clock */ + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08); /* Configure GPIO as output */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03); /* Configure driving */ diff --git a/drivers/mfd/rts5227.c b/drivers/mfd/rts5227.c index 42ebf5c050c1..724ce4c54523 100644 --- a/drivers/mfd/rts5227.c +++ b/drivers/mfd/rts5227.c @@ -101,6 +101,8 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) /* Configure GPIO as output */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); + /* Reset ASPM state to default value */ + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); /* Switch LDO3318 source from DV33 to card_3v3 */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); diff --git a/drivers/mfd/rts5229.c b/drivers/mfd/rts5229.c index a0b695af8561..e8261d7436a8 100644 --- a/drivers/mfd/rts5229.c +++ b/drivers/mfd/rts5229.c @@ -67,6 +67,10 @@ static int rts5229_extra_init_hw(struct rtsx_pcr *pcr) /* Configure GPIO as output */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); + /* Reset ASPM state to default value */ + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); + /* Force CLKREQ# PIN to drive 0 to request clock */ + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08); /* Switch LDO3318 source from DV33 to card_3v3 */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); diff --git a/drivers/mfd/rts5249.c b/drivers/mfd/rts5249.c index 79ff212c3e7b..c5e54d7cf528 100644 --- a/drivers/mfd/rts5249.c +++ b/drivers/mfd/rts5249.c @@ -104,6 +104,8 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) /* Configure GPIO as output */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); + /* Reset ASPM state to default value */ + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); /* Switch LDO3318 source from DV33 to card_3v3 */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); diff --git a/drivers/mfd/rtsx_pcr.c b/drivers/mfd/rtsx_pcr.c index 97526f1acf96..ffd393c06d34 100644 --- a/drivers/mfd/rtsx_pcr.c +++ b/drivers/mfd/rtsx_pcr.c @@ -972,8 +972,6 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); /* Disable card clock */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); - /* Reset ASPM state to default value */ - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); /* Reset delink mode */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); /* Card driving select */ @@ -1003,8 +1001,6 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) * 0: ELBI interrupt flag[31:22] & [7:0] only can be write clear */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); - /* Force CLKREQ# PIN to drive 0 to request clock */ - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08); err = rtsx_pci_send_cmd(pcr, 100); if (err < 0) |