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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2014-09-12 16:11:59 +0400
committerMark Brown <broonie@kernel.org>2014-09-13 20:01:57 +0400
commitea092455d713d28c0b74a2ebe022524025d97491 (patch)
tree33644044669966b84343bc875cecebd405934e16
parentfb57862ead652454ceeb659617404c5f13bc34b5 (diff)
downloadlinux-ea092455d713d28c0b74a2ebe022524025d97491.tar.xz
spi: dw-mid: remove Moorestown support
The support of the Moorestown was removed [1] from kernel long time ago. This is just a follow up of that change. [1] http://www.spinics.net/lists/platform-driver-x86/msg02948.html Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/Kconfig2
-rw-r--r--drivers/spi/spi-dw-mid.c8
2 files changed, 4 insertions, 6 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 62e2242ad7e0..6343df87afb3 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -591,7 +591,7 @@ config SPI_DW_PCI
depends on SPI_DESIGNWARE && PCI
config SPI_DW_MID_DMA
- bool "DMA support for DW SPI controller on Intel Moorestown platform"
+ bool "DMA support for DW SPI controller on Intel MID platform"
depends on SPI_DW_PCI && INTEL_MID_DMAC
config SPI_DW_MMIO
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index 0d88e4aab73e..deba3c459d68 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -50,11 +50,9 @@ static int mid_spi_dma_init(struct dw_spi *dws)
/*
* Get pci device for DMA controller, currently it could only
- * be the DMA controller of either Moorestown or Medfield
+ * be the DMA controller of Medfield
*/
- dws->dmac = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0813, NULL);
- if (!dws->dmac)
- dws->dmac = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0827, NULL);
+ dws->dmac = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0827, NULL);
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
@@ -192,7 +190,7 @@ static struct dw_spi_dma_ops mid_dma_ops = {
};
#endif
-/* Some specific info for SPI0 controller on Moorestown */
+/* Some specific info for SPI0 controller on Intel MID */
/* HW info for MRST CLk Control Unit, one 32b reg */
#define MRST_SPI_CLK_BASE 100000000 /* 100m */