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| author | Stephen Warren <swarren@nvidia.com> | 2014-04-02 00:13:15 +0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-04-24 17:36:40 +0400 |
| commit | 862f0eea38409ff0d7f226c1245b787e3f0e2607 (patch) | |
| tree | fd2b541bbd2f0c19aa3fae75c0e129452d2cc85d | |
| parent | f126776a2114e453ff48dc882603bae2d82bfc2f (diff) | |
| download | linux-862f0eea38409ff0d7f226c1245b787e3f0e2607.tar.xz | |
ARM: tegra: remove UART5/UARTE from tegra124.dtsi
Tegra124 only has 4 UARTs. Parts of the documentation hint at a fifth
UART, but this appears to be left-over from earlier SoC documentation.
Remove the non-existent DT node for UART5.
Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index cf45a1a39483..6d540a025148 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -233,19 +233,6 @@ status = "disabled"; }; - serial@0,70006400 { - compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; - reg = <0x0 0x70006400 0x0 0x40>; - reg-shift = <2>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&tegra_car TEGRA124_CLK_UARTE>; - resets = <&tegra_car 66>; - reset-names = "serial"; - dmas = <&apbdma 20>, <&apbdma 20>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - pwm@0,7000a000 { compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm"; reg = <0x0 0x7000a000 0x0 0x100>; |