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author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2015-04-11 03:28:00 +0300 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2015-04-11 03:28:00 +0300 |
commit | baa9a93a4412330a49245e69c5e8b22086656482 (patch) | |
tree | 31e71829d280592d907be8110c05449758ba772c | |
parent | d5cdc3c4c22fce5a187b51736f3d0dc3e6cbe282 (diff) | |
parent | cab07a5652d1d124b505c2b7ed21c6823295c5d7 (diff) | |
download | linux-baa9a93a4412330a49245e69c5e8b22086656482.tar.xz |
Merge branch 'cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux into pm-cpuidle
Pull intel_idle material for v4.1 from Len Brown.
* 'cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
intel_idle: Add support for the Airmont Core in the Cherrytrail and Braswell SOCs
intel_idle: Update support for Silvermont Core in Baytrail SOC
-rw-r--r-- | drivers/idle/intel_idle.c | 66 |
1 files changed, 55 insertions, 11 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index f5b7fc56fa4a..1fb52f4e5870 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -218,18 +218,10 @@ static struct cpuidle_state byt_cstates[] = { .enter = &intel_idle, .enter_freeze = intel_idle_freeze, }, { - .name = "C1E-BYT", - .desc = "MWAIT 0x01", - .flags = MWAIT2flg(0x01), - .exit_latency = 15, - .target_residency = 30, - .enter = &intel_idle, - .enter_freeze = intel_idle_freeze, }, - { .name = "C6N-BYT", .desc = "MWAIT 0x58", .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED, - .exit_latency = 40, + .exit_latency = 300, .target_residency = 275, .enter = &intel_idle, .enter_freeze = intel_idle_freeze, }, @@ -237,7 +229,7 @@ static struct cpuidle_state byt_cstates[] = { .name = "C6S-BYT", .desc = "MWAIT 0x52", .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED, - .exit_latency = 140, + .exit_latency = 500, .target_residency = 560, .enter = &intel_idle, .enter_freeze = intel_idle_freeze, }, @@ -246,7 +238,7 @@ static struct cpuidle_state byt_cstates[] = { .desc = "MWAIT 0x60", .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, .exit_latency = 1200, - .target_residency = 1500, + .target_residency = 4000, .enter = &intel_idle, .enter_freeze = intel_idle_freeze, }, { @@ -261,6 +253,51 @@ static struct cpuidle_state byt_cstates[] = { .enter = NULL } }; +static struct cpuidle_state cht_cstates[] = { + { + .name = "C1-CHT", + .desc = "MWAIT 0x00", + .flags = MWAIT2flg(0x00), + .exit_latency = 1, + .target_residency = 1, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C6N-CHT", + .desc = "MWAIT 0x58", + .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 80, + .target_residency = 275, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C6S-CHT", + .desc = "MWAIT 0x52", + .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 200, + .target_residency = 560, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C7-CHT", + .desc = "MWAIT 0x60", + .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 1200, + .target_residency = 4000, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C7S-CHT", + .desc = "MWAIT 0x64", + .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 10000, + .target_residency = 20000, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .enter = NULL } +}; + static struct cpuidle_state ivb_cstates[] = { { .name = "C1-IVB", @@ -748,6 +785,12 @@ static const struct idle_cpu idle_cpu_byt = { .byt_auto_demotion_disable_flag = true, }; +static const struct idle_cpu idle_cpu_cht = { + .state_table = cht_cstates, + .disable_promotion_to_c1e = true, + .byt_auto_demotion_disable_flag = true, +}; + static const struct idle_cpu idle_cpu_ivb = { .state_table = ivb_cstates, .disable_promotion_to_c1e = true, @@ -790,6 +833,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = { ICPU(0x2d, idle_cpu_snb), ICPU(0x36, idle_cpu_atom), ICPU(0x37, idle_cpu_byt), + ICPU(0x4c, idle_cpu_cht), ICPU(0x3a, idle_cpu_ivb), ICPU(0x3e, idle_cpu_ivt), ICPU(0x3c, idle_cpu_hsw), |