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| author | David S. Miller <davem@davemloft.net> | 2005-11-30 00:59:03 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2005-11-30 00:59:03 +0300 |
| commit | cab3f16febeaf1a60e38159ff578f609f9976544 (patch) | |
| tree | 94fdc12b7ae46d285180be9fa8d03e7be6d63f71 | |
| parent | 4168f7a31801bba6acc18662978d24ec850bbbd0 (diff) | |
| download | linux-cab3f16febeaf1a60e38159ff578f609f9976544.tar.xz | |
[SPARC64]: Fix >8K I/O mappings.
Increment the PFN field of the PTE so that the tests
on vm_pfn in mm/memory.c match up. The TLB ignores these
lower bits for larger page sizes, so it's OK to set things
like this.
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | arch/sparc64/mm/generic.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/sparc64/mm/generic.c b/arch/sparc64/mm/generic.c index d9396c1721cd..580b63da836b 100644 --- a/arch/sparc64/mm/generic.c +++ b/arch/sparc64/mm/generic.c @@ -77,6 +77,7 @@ static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte, BUG_ON(!pte_none(*pte)); set_pte_at(mm, address, pte, entry); address += PAGE_SIZE; + pte_val(entry) += PAGE_SIZE; pte++; } while (address < curend); } while (address < end); |