diff options
| author | Sujith Manoharan <c_manoha@qca.qualcomm.com> | 2015-03-09 11:50:07 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2015-03-13 16:19:30 +0300 |
| commit | afa7e6dbd91d3d9e18d224116353087082479dc5 (patch) | |
| tree | fe80ccc90c720d770ecf790fe1ac790508c9a15a | |
| parent | e519f78f1191007604c056dfcb372d4fe3a4b05b (diff) | |
| download | linux-afa7e6dbd91d3d9e18d224116353087082479dc5.tar.xz | |
ath9k: Fix PLL powersave for AR9485
Use the value in ah->config.pll_pwrsave to determine
which array needs to be loaded. Also, initialize
pll_pwrsave to 1 by default.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_hw.c | 10 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 2 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/init.c | 8 |
3 files changed, 13 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c index 4335ccbe7d7e..ea33f8dcc171 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c @@ -195,16 +195,16 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) INIT_INI_ARRAY(&ah->iniCckfirJapan2484, ar9485_1_1_baseband_core_txfir_coeff_japan_2484); - if (ah->config.no_pll_pwrsave) { + if (ah->config.pll_pwrsave & AR_PCIE_PLL_PWRSAVE_CONTROL) { INIT_INI_ARRAY(&ah->iniPcieSerdes, - ar9485_1_1_pcie_phy_clkreq_disable_L1); + ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1); INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, - ar9485_1_1_pcie_phy_clkreq_disable_L1); + ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1); } else { INIT_INI_ARRAY(&ah->iniPcieSerdes, - ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1); + ar9485_1_1_pcie_phy_clkreq_disable_L1); INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, - ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1); + ar9485_1_1_pcie_phy_clkreq_disable_L1); } } else if (AR_SREV_9462_21(ah)) { INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 2bb3b334a23f..e124ee240dc8 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -341,7 +341,7 @@ struct ath9k_ops_config { u32 ant_ctrl_comm2g_switch_enable; bool xatten_margin_cfg; bool alt_mingainidx; - bool no_pll_pwrsave; + bool pll_pwrsave; bool tx_gain_buffalo; bool led_active_high; }; diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index 6c6e88495394..ca66fab78fba 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c @@ -437,8 +437,14 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc) ath_info(common, "Enable WAR for ASPM D3/L1\n"); } + /* + * The default value of pll_pwrsave is 1. + * For certain AR9485 cards, it is set to 0. + */ + ah->config.pll_pwrsave = 1; + if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) { - ah->config.no_pll_pwrsave = true; + ah->config.pll_pwrsave = 0; ath_info(common, "Disable PLL PowerSave\n"); } |