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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-01-11 17:31:37 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-01-19 16:20:23 +0300
commit216e234d66860c265f0c20d11d768e4596a8d2e6 (patch)
treef9a2d9fc61fcec4cab6d2ea8ab398fab4ccbb9f5
parent6d59225f2da7e8db31aa10b458eef7e8d8f53076 (diff)
downloadlinux-216e234d66860c265f0c20d11d768e4596a8d2e6.tar.xz
serial: 8250_mid: set PCI master only for DMA capable device
There is no need to set PCI bus mastering when device is not doing any DMA. It includes MSI type of interrupts. Currently only UART on Denverton, which is DMA capable, might have MSI enabled. Taking above into account enable bus mastering for Denverton case only. Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/tty/serial/8250/8250_mid.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/tty/serial/8250/8250_mid.c b/drivers/tty/serial/8250/8250_mid.c
index 85011c9ac0ee..ec957cce8c9a 100644
--- a/drivers/tty/serial/8250/8250_mid.c
+++ b/drivers/tty/serial/8250/8250_mid.c
@@ -164,6 +164,8 @@ static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
unsigned int bar = FL_GET_BASE(mid->board->flags);
int ret;
+ pci_set_master(pdev);
+
ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
if (ret < 0)
return ret;
@@ -289,8 +291,6 @@ static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if (ret)
return ret;
- pci_set_master(pdev);
-
mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
if (!mid)
return -ENOMEM;