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authorSujith Manoharan <c_manoha@qca.qualcomm.com>2015-02-05 07:52:41 +0300
committerKalle Valo <kvalo@codeaurora.org>2015-02-26 15:58:39 +0300
commitb39adc63bf0c014b0582c191a83272ea7f92ee8a (patch)
tree0dfa6897b601f2f2d8d5049b6bfd1b5feec29667
parentff6f0c036b3271f080b0c585e6859d52aac2e0e0 (diff)
downloadlinux-b39adc63bf0c014b0582c191a83272ea7f92ee8a.tar.xz
ath9k: Check MCI PowerSave state
The power save state of MCI has to be disabled when enabling WoW sleep, check this properly. ar9003_mci_state() doesn't handle MCI_STATE_GET_WLAN_PS_STATE right now, but this will be done later when proper support for MCI/PS is added. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_mci.h7
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_wow.c16
2 files changed, 22 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mci.h b/drivers/net/wireless/ath/ath9k/ar9003_mci.h
index 19800afb5e9f..cef20103fc86 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_mci.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mci.h
@@ -188,6 +188,13 @@ enum mci_bt_state {
MCI_BT_CAL
};
+enum mci_ps_state {
+ MCI_PS_DISABLE,
+ MCI_PS_ENABLE,
+ MCI_PS_ENABLE_OFF,
+ MCI_PS_ENABLE_ON
+};
+
/* Type of state query */
enum mci_state_type {
MCI_STATE_ENABLE,
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_wow.c b/drivers/net/wireless/ath/ath9k/ar9003_wow.c
index 721caf36ce83..bf3378f03b9a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_wow.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_wow.c
@@ -20,11 +20,25 @@
#include "reg_wow.h"
#include "hw-ops.h"
+static void ath9k_hw_set_sta_powersave(struct ath_hw *ah)
+{
+ if (!ath9k_hw_mci_is_enabled(ah))
+ goto set;
+ /*
+ * If MCI is being used, set PWR_SAV only when MCI's
+ * PS state is disabled.
+ */
+ if (ar9003_mci_state(ah, MCI_STATE_GET_WLAN_PS_STATE) != MCI_PS_DISABLE)
+ return;
+set:
+ REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
+}
+
static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
- REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
+ ath9k_hw_set_sta_powersave(ah);
/* set rx disable bit */
REG_WRITE(ah, AR_CR, AR_CR_RXD);