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author | Paul Mundt <lethal@linux-sh.org> | 2010-01-15 10:31:04 +0300 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2010-01-15 10:31:04 +0300 |
commit | 6f832e8aab8c4c6d28629e970e4a85e74a8d0be6 (patch) | |
tree | f62382c323f2724b36d13b26b34052651e9d59a6 | |
parent | f0cb77372c3cf8c0cb17bbfb30a62506ea119286 (diff) | |
download | linux-6f832e8aab8c4c6d28629e970e4a85e74a8d0be6.tar.xz |
sh: mach-sdk7786: mode pins support.
This wires up the mode pins support on the SDK7786. The pins are
standard SH7786 pins, and all are fixed in software. Needed for the
clock framework, PCIe, and so forth.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/boards/mach-sdk7786/setup.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c index f2d4b75bf31c..c38c6cc293b5 100644 --- a/arch/sh/boards/mach-sdk7786/setup.c +++ b/arch/sh/boards/mach-sdk7786/setup.c @@ -218,6 +218,23 @@ static void __init init_sdk7786_IRQ(void) plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK); } +#define MODSWR_REGS 0x07fff830 + +static int sdk7786_mode_pins(void) +{ + void __iomem *modswr; + int pin_states; + + modswr = ioremap_nocache(MODSWR_REGS, SZ_16); + if (!modswr) + return -ENXIO; + + pin_states = ioread16(modswr); + iounmap(modswr); + + return pin_states; +} + /* Initialize the board */ static void __init sdk7786_setup(char **cmdline_p) { @@ -230,5 +247,6 @@ static void __init sdk7786_setup(char **cmdline_p) static struct sh_machine_vector mv_sdk7786 __initmv = { .mv_name = "SDK7786", .mv_setup = sdk7786_setup, + .mv_mode_pins = sdk7786_mode_pins, .mv_init_irq = init_sdk7786_IRQ, }; |