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authorGuenter Roeck <linux@roeck-us.net>2015-08-22 12:40:41 +0300
committerRalf Baechle <ralf@linux-mips.org>2015-09-03 13:08:06 +0300
commit42b002ab73e00b24356be4f01954fa961fea4d82 (patch)
tree4fed22402c86cd5a68349ef79774bd5d2dbde211
parent67d4e669c1e504a491e44737f3561eaba919b304 (diff)
downloadlinux-42b002ab73e00b24356be4f01954fa961fea4d82.tar.xz
MIPS: Kconfig: Enable common clock framework for Malta and SEAD3
Now that we're ready to enable COMMON_CLK for GIC platforms do so for Malta and SEAD3. The only other user of the GIC Pistachio does already do so. [ralf@linux-mips.org: Rewrite the commit message because applied in the right order there is no breakage thus no fix required.] Signed-off-by: Guenter Roeck <linux@roeck-us.net> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11038/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7a9a2554fa00..8083ef9c80d4 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -409,6 +409,7 @@ config MIPS_MALTA
select CEVT_R4K
select CSRC_R4K
select CLKSRC_MIPS_GIC
+ select COMMON_CLK
select DMA_MAYBE_COHERENT
select GENERIC_ISA_DMA
select HAVE_PCSPKR_PLATFORM
@@ -459,6 +460,7 @@ config MIPS_SEAD3
select CEVT_R4K
select CSRC_R4K
select CLKSRC_MIPS_GIC
+ select COMMON_CLK
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select DMA_NONCOHERENT