diff options
| author | Carolyn Wyborny <carolyn.wyborny@intel.com> | 2011-06-25 17:18:12 +0400 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-07-12 05:42:14 +0400 |
| commit | 064b43304ed8ede8e13ff7b4338d09fd37bcffb1 (patch) | |
| tree | 97b35ed92004def709aef245e69810656397fbcf | |
| parent | d84e0bd7971eb8357c700151ee4e8e4101ee65fa (diff) | |
| download | linux-064b43304ed8ede8e13ff7b4338d09fd37bcffb1.tar.xz | |
igb: Fix lack of flush after register write and before delay
Register writes followed by a delay are required to have a flush
before the delay in order to commit the values to the register. Without
the flush, the code following the delay may not function correctly.
Reported-by: Tong Ho <tong.ho@ericsson.com>
Reported-by: Guenter Roeck <guenter.roeck@ericsson.com>
Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| -rw-r--r-- | drivers/net/igb/e1000_82575.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index 0f563c8c5ffc..493e331d7064 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c @@ -1735,6 +1735,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw) ctrl |= E1000_CTRL_RST; wr32(E1000_CTRL, ctrl); + wrfl(); /* Add delay to insure DEV_RST has time to complete */ if (global_device_reset) |