diff options
| author | Mans Rullgard <mans@mansr.com> | 2016-03-18 17:24:42 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2016-04-13 19:06:10 +0300 |
| commit | bb3450ad0ed618fda84fbd2e28065bd7791fd7f9 (patch) | |
| tree | 8d2b7b280e5073d53dd9a86af04830fc77a25885 | |
| parent | c422025c185fb2bb28df65b1bbed7953480c7f87 (diff) | |
| download | linux-bb3450ad0ed618fda84fbd2e28065bd7791fd7f9.tar.xz | |
dmaengine: dw: set src and dst master select according to xfer direction
On some architectures the DMA controller can have two masters connected to
different buses and thus access to memory is possible only through one and
to peripheral through the other.
This patch changes the src and dst master setting to match the direction
of the transfer.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| -rw-r--r-- | drivers/dma/dw/core.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 5bd7873a02c6..d810980e652d 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -45,13 +45,17 @@ DW_DMA_MSIZE_16; \ u8 _dmsize = _is_slave ? _sconfig->dst_maxburst : \ DW_DMA_MSIZE_16; \ + u8 _dms = (_dwc->direction == DMA_MEM_TO_DEV) ? \ + _dwc->p_master : _dwc->m_master; \ + u8 _sms = (_dwc->direction == DMA_DEV_TO_MEM) ? \ + _dwc->p_master : _dwc->m_master; \ \ (DWC_CTLL_DST_MSIZE(_dmsize) \ | DWC_CTLL_SRC_MSIZE(_smsize) \ | DWC_CTLL_LLP_D_EN \ | DWC_CTLL_LLP_S_EN \ - | DWC_CTLL_DMS(_dwc->p_master) \ - | DWC_CTLL_SMS(_dwc->m_master)); \ + | DWC_CTLL_DMS(_dms) \ + | DWC_CTLL_SMS(_sms)); \ }) /* |