diff options
author | David S. Miller <davem@davemloft.net> | 2012-10-17 00:05:25 +0400 |
---|---|---|
committer | Ben Hutchings <ben@decadent.org.uk> | 2012-10-31 03:26:31 +0400 |
commit | 00f784c84afeae6380f6f5c3f993d3da501dc648 (patch) | |
tree | 84742e49794f1d6ac040606daff468b4430c22cb | |
parent | 6471fbc6eb71dd615075f58576ad813697700873 (diff) | |
download | linux-00f784c84afeae6380f6f5c3f993d3da501dc648.tar.xz |
sparc64: Fix bit twiddling in sparc_pmu_enable_event().
[ Upstream commit e793d8c6740f8fe704fa216e95685f4d92c4c4b9 ]
There was a serious disconnect in the logic happening in
sparc_pmu_disable_event() vs. sparc_pmu_enable_event().
Event disable is implemented by programming a NOP event into the PCR.
However, event enable was not reversing this operation. Instead, it
was setting the User/Priv/Hypervisor trace enable bits.
That's not sparc_pmu_enable_event()'s job, that's what
sparc_pmu_enable() and sparc_pmu_disable() do .
The intent of sparc_pmu_enable_event() is clear, since it first clear
out the event type encoding field. So fix this by OR'ing in the event
encoding rather than the trace enable bits.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
-rw-r--r-- | arch/sparc/kernel/perf_event.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 5331ae177472..3c8f2202affe 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c @@ -555,11 +555,13 @@ static u64 nop_for_index(int idx) static inline void sparc_pmu_enable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, int idx) { - u64 val, mask = mask_for_index(idx); + u64 enc, val, mask = mask_for_index(idx); + + enc = perf_event_get_enc(cpuc->events[idx]); val = cpuc->pcr; val &= ~mask; - val |= hwc->config; + val |= event_encoding(enc, idx); cpuc->pcr = val; pcr_ops->write(cpuc->pcr); |