kernel/linux.git/virt/kvm/arm/arch_timer.c, branch v4.11.2

KVM: arm/arm64: Emulate the EL1 phys timer registers

2017-02-08T15:13:37+00:00

Emulate read and write operations to CNTP_TVAL, CNTP_CVAL and CNTP_CTL. Now VMs are able to use the EL1 physical timer. Signed-off-by: Jintack Lim Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier

KVM: arm/arm64: Set up a background timer for the physical timer emulation

2017-02-08T15:13:36+00:00

Set a background timer for the EL1 physical timer emulation while VMs are running, so that VMs get the physical timer interrupts in a timely manner. Schedule the background timer on entry to the VM and cancel it on exit. This would not have any performance impact to the guest OSes that currently use the virtual timer since the physical timer is always not enabled. Signed-off-by: Jintack Lim Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier

KVM: arm/arm64: Set a background timer to the earliest timer expiration

2017-02-08T15:13:35+00:00

When scheduling a background timer, consider both of the virtual and physical timer and pick the earliest expiration time. Signed-off-by: Jintack Lim Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier

KVM: arm/arm64: Update the physical timer interrupt level

2017-02-08T15:13:35+00:00

Now that we maintain the EL1 physical timer register states of VMs, update the physical timer interrupt level along with the virtual one. Signed-off-by: Jintack Lim Acked-by: Christoffer Dall Signed-off-by: Marc Zyngier

KVM: arm/arm64: Initialize the emulated EL1 physical timer

2017-02-08T15:13:34+00:00

Initialize the emulated EL1 physical timer with the default irq number. Signed-off-by: Jintack Lim Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier

KVM: arm/arm64: Decouple kvm timer functions from virtual timer

2017-02-08T15:13:33+00:00

Now that we have a separate structure for timer context, make functions generic so that they can work with any timer context, not just the virtual timer context. This does not change the virtual timer functionality. Signed-off-by: Jintack Lim Acked-by: Marc Zyngier Acked-by: Christoffer Dall Signed-off-by: Marc Zyngier

KVM: arm/arm64: Move cntvoff to each timer context

2017-02-08T15:13:33+00:00

Make cntvoff per each timer context. This is helpful to abstract kvm timer functions to work with timer context without considering timer types (e.g. physical timer or virtual timer). This also would pave the way for ever doing adjustments of the cntvoff on a per-CPU basis if that should ever make sense. Signed-off-by: Jintack Lim Signed-off-by: Christoffer Dall Signed-off-by: Marc Zyngier

KVM: arm/arm64: Abstract virtual timer context into separate structure

2017-02-08T15:13:32+00:00

Abstract virtual timer context into a separate structure and change all callers referring to timer registers, irq state and so on. No change in functionality. This is about to become very handy when adding the EL1 physical timer. Signed-off-by: Jintack Lim Acked-by: Christoffer Dall Acked-by: Marc Zyngier Signed-off-by: Marc Zyngier

KVM: arm/arm64: Remove kvm_vgic_inject_mapped_irq

2017-02-01T10:56:35+00:00

The only benefit of having kvm_vgic_inject_mapped_irq separate from kvm_vgic_inject_irq is that we pass a boolean that we use for error checking on the injection path. While this could potentially help in some aspect of robustness, it's also a little bit of a defensive move, and arguably callers into the vgic should have make sure they have marked their virtual IRQs as mapped if required. Acked-by: Marc Zyngier Reviewed-by: Andre Przywara Signed-off-by: Christoffer Dall

KVM: arm64: Access CNTHCTL_EL2 bit fields correctly on VHE systems

2017-01-13T11:19:25+00:00

Current KVM world switch code is unintentionally setting wrong bits to CNTHCTL_EL2 when E2H == 1, which may allow guest OS to access physical timer. Bit positions of CNTHCTL_EL2 are changing depending on HCR_EL2.E2H bit. EL1PCEN and EL1PCTEN are 1st and 0th bits when E2H is not set, but they are 11th and 10th bits respectively when E2H is set. In fact, on VHE we only need to set those bits once, not for every world switch. This is because the host kernel runs in EL2 with HCR_EL2.TGE == 1, which makes those bits have no effect for the host kernel execution. So we just set those bits once for guests, and that's it. Signed-off-by: Jintack Lim Reviewed-by: Marc Zyngier Signed-off-by: Marc Zyngier