<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/tools/testing/selftests/arm64/abi, branch v6.7</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.7</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-10-13T18:12:46+00:00</updated>
<entry>
<title>kselftest/arm64: add FEAT_LSE128 to hwcap test</title>
<updated>2023-10-13T18:12:46+00:00</updated>
<author>
<name>Joey Gouly</name>
<email>joey.gouly@arm.com</email>
</author>
<published>2023-10-03T12:45:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=72e301956dbb31bd679eff66fbe3da32d2dc2af5'/>
<id>urn:sha1:72e301956dbb31bd679eff66fbe3da32d2dc2af5</id>
<content type='text'>
Add test of a 128-bit atomic instruction for FEAT_LSE128.

Signed-off-by: Joey Gouly &lt;joey.gouly@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Link: https://lore.kernel.org/r/20231003124544.858804-3-joey.gouly@arm.com
[catalin.marinas@arm.com: reordered lse128_sigill() alphabetically]
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>selftests/arm64: add HWCAP2_LRCPC3 test</title>
<updated>2023-10-13T18:12:03+00:00</updated>
<author>
<name>Joey Gouly</name>
<email>joey.gouly@arm.com</email>
</author>
<published>2023-09-19T16:27:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=80652cc0c0485da593c1639a6355dcdab95364e6'/>
<id>urn:sha1:80652cc0c0485da593c1639a6355dcdab95364e6</id>
<content type='text'>
Add a test for the newly added HWCAP2_LRCPC3.

Signed-off-by: Joey Gouly &lt;joey.gouly@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Link: https://lore.kernel.org/r/20230919162757.2707023-3-joey.gouly@arm.com
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>kselftest/arm64: Verify HWCAP2_SVE_B16B16</title>
<updated>2023-09-29T14:56:17+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2023-09-15T12:18:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3accaef1f61e0c5531ae9e92ff0d66981cdf1516'/>
<id>urn:sha1:3accaef1f61e0c5531ae9e92ff0d66981cdf1516</id>
<content type='text'>
Validate that SVE B16B16 support is reported correctly and consistently to
userspace.

Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20230915-arm64-zfr-b16b16-el0-v1-2-f9aba807bdb5@kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-next/selftests' into for-next/core</title>
<updated>2023-08-25T11:36:57+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2023-08-25T11:36:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e1df27213941725962f68c64349bbcc60ece0314'/>
<id>urn:sha1:e1df27213941725962f68c64349bbcc60ece0314</id>
<content type='text'>
* for-next/selftests: (22 commits)
  kselftest/arm64: Fix hwcaps selftest build
  kselftest/arm64: add jscvt feature to hwcap test
  kselftest/arm64: add pmull feature to hwcap test
  kselftest/arm64: add AES feature check to hwcap test
  kselftest/arm64: add SHA1 and related features to hwcap test
  kselftest/arm64: build BTI tests in output directory
  kselftest/arm64: fix a memleak in zt_regs_run()
  kselftest/arm64: Size sycall-abi buffers for the actual maximum VL
  kselftest/arm64: add lse and lse2 features to hwcap test
  kselftest/arm64: add test item that support to capturing the SIGBUS signal
  kselftest/arm64: add DEF_SIGHANDLER_FUNC() and DEF_INST_RAISE_SIG() helpers
  kselftest/arm64: add crc32 feature to hwcap test
  kselftest/arm64: add float-point feature to hwcap test
  kselftest/arm64: Use the tools/include compiler.h rather than our own
  kselftest/arm64: Use shared OPTIMZER_HIDE_VAR() definiton
  kselftest/arm64: Make the tools/include headers available
  tools include: Add some common function attributes
  tools compiler.h: Add OPTIMIZER_HIDE_VAR()
  kselftest/arm64: Exit streaming mode after collecting signal context
  kselftest/arm64: add RCpc load-acquire to hwcap test
  ...
</content>
</entry>
<entry>
<title>kselftest/arm64: Fix hwcaps selftest build</title>
<updated>2023-08-18T16:07:44+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2023-08-16T18:39:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=94f23ac36f8b3c2140b00d78131c8df41cd9ac5d'/>
<id>urn:sha1:94f23ac36f8b3c2140b00d78131c8df41cd9ac5d</id>
<content type='text'>
The hwcaps selftest currently relies on the assembler being able to
assemble the crc32w instruction but this is not in the base v8.0 so is not
accepted by the standard GCC configurations used by many distributions.
Switch to manually encoding to fix the build.

Fixes: 09d2e95a04ad ("kselftest/arm64: add crc32 feature to hwcap test")
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20230816-arm64-fix-crc32-build-v1-1-40165c1290f2@kernel.org
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>kselftest/arm64: add jscvt feature to hwcap test</title>
<updated>2023-08-16T14:24:01+00:00</updated>
<author>
<name>Zeng Heng</name>
<email>zengheng4@huawei.com</email>
</author>
<published>2023-08-15T04:09:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fcb0b51a5dca1f69f408dfe5fd970cf167d41538'/>
<id>urn:sha1:fcb0b51a5dca1f69f408dfe5fd970cf167d41538</id>
<content type='text'>
Add the jscvt feature check in the set of hwcap tests.

Due to the requirement of jscvt feature, a compiler configuration
of v8.3 or above is needed to support assembly. Therefore, hand
encode is used here instead.

Signed-off-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20230815040915.3966955-5-zengheng4@huawei.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>kselftest/arm64: add pmull feature to hwcap test</title>
<updated>2023-08-16T14:24:01+00:00</updated>
<author>
<name>Zeng Heng</name>
<email>zengheng4@huawei.com</email>
</author>
<published>2023-08-15T04:09:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2c3ce0e7dd5154ffa017cd4dab3b14c09272c4a5'/>
<id>urn:sha1:2c3ce0e7dd5154ffa017cd4dab3b14c09272c4a5</id>
<content type='text'>
Add the pmull feature check in the set of hwcap tests.

Signed-off-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20230815040915.3966955-4-zengheng4@huawei.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>kselftest/arm64: add AES feature check to hwcap test</title>
<updated>2023-08-16T14:24:01+00:00</updated>
<author>
<name>Zeng Heng</name>
<email>zengheng4@huawei.com</email>
</author>
<published>2023-08-15T04:09:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3fc3c0d1246cfe440d9c44f2134fde432b311ab3'/>
<id>urn:sha1:3fc3c0d1246cfe440d9c44f2134fde432b311ab3</id>
<content type='text'>
Add the AES feature check in the set of hwcap tests.

Signed-off-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20230815040915.3966955-3-zengheng4@huawei.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>kselftest/arm64: add SHA1 and related features to hwcap test</title>
<updated>2023-08-16T14:24:01+00:00</updated>
<author>
<name>Zeng Heng</name>
<email>zengheng4@huawei.com</email>
</author>
<published>2023-08-15T04:09:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7eb4ee66739ea187d3855f6dbf2ab48a512b4ae0'/>
<id>urn:sha1:7eb4ee66739ea187d3855f6dbf2ab48a512b4ae0</id>
<content type='text'>
Add the SHA1 and related features check in the set of hwcap tests.

Signed-off-by: Zeng Heng &lt;zengheng4@huawei.com&gt;
Reviewed-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20230815040915.3966955-2-zengheng4@huawei.com
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>kselftest/arm64: Size sycall-abi buffers for the actual maximum VL</title>
<updated>2023-08-11T11:24:51+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2023-08-10T11:39:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=358b763ee64b11f45287c286e1f6145729ed49ab'/>
<id>urn:sha1:358b763ee64b11f45287c286e1f6145729ed49ab</id>
<content type='text'>
Our ABI opts to provide future proofing by defining a much larger
SVE_VQ_MAX than the architecture actually supports.  Since we use
this define to control the size of our vector data buffers this results
in a lot of overhead when we initialise which can be a very noticable
problem in emulation, we fill buffers that are orders of magnitude
larger than we will ever actually use even with virtual platforms that
provide the full range of architecturally supported vector lengths.

Define and use the actual architecture maximum to mitigate this.

Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20230810-arm64-syscall-abi-perf-v1-1-6a0d7656359c@kernel.org
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
</feed>
