kernel/linux.git/tools/perf/util/arm-spe-decoder, branch v6.19.11Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.112025-11-19T04:31:30+00:00perf arm_spe: Expose SIMD information in other operations2025-11-19T04:31:30+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:42+00:00urn:sha1:b70aa41078a6ad044b655f124b6b431f916dfac5
The other operations contain SME data processing, ASE (Advanced SIMD)
and floating-point operations. Expose these info in the records.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Report GCS in record2025-11-19T04:31:30+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:41+00:00urn:sha1:d67835cd5d0a5ac5490895c6a0eafc3bd8e96932
Report GCS related info in records.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Report memset and memcpy in records2025-11-19T04:31:30+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:40+00:00urn:sha1:d4b61de44f34589d5233f3e7dc445e06df6bb388
Expose memset and memcpy related info in records.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Report associated info for SVE / SME operations2025-11-19T04:31:29+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:39+00:00urn:sha1:6d47c32ccb0e85e484b523d324c471481b7ca9c1
SVE / SME operations can be predicated or Gather load / scatter store,
save the relevant info into record.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Report extended memory operations in records2025-11-19T04:31:29+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:38+00:00urn:sha1:f3b9bed72e37e5fa14184d8634a9c88117d1fcb1
Extended memory operations include atomic (AT), acquire/release (AR),
and exclusive (EXCL) operations. Save the relevant information
in the records.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Report MTE allocation tag in record2025-11-19T04:31:29+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:37+00:00urn:sha1:c462dc70b1dc2b3fbb95d2cd2748185edc5ae30b
Save MTE tag info in memory record.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Report register access in record2025-11-19T04:31:29+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:36+00:00urn:sha1:77e4291eaf74bc6e297519d472cd46e6035d91be
Record register access info for load / store operations.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Introduce data processing macro for SVE operations2025-11-19T04:31:29+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:35+00:00urn:sha1:cdc1aff17f1b72d112f508450f2d103b6b955b74
Introduce the ARM_SPE_OP_DP (data processing) macro as associated
information for SVE operations. For SVE register access, only
ARM_SPE_OP_SVE is set; for SVE data processing, both ARM_SPE_OP_SVE and
ARM_SPE_OP_DP are set together.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Consolidate operation types2025-11-19T04:31:29+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:34+00:00urn:sha1:b64bf913b3da2ba7a00ae780cbf9612ab25d9891
Consolidate operation types in a way:
(a) Extract the second-level types into separate enums.
(b) The second-level types for memory and SIMD operations are classified
by modules. E.g., an operation may relate to general register,
SIMD/FP, SVE, etc.
(c) The associated information tells details. E.g., an operation is
load or store, whether it is atomic operation, etc.
Start the enum items for the second-level types from 8 to accommodate
more entries within a 32-bit integer.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
perf arm_spe: Remove unused operation types2025-11-19T04:31:29+00:00Leo Yanleo.yan@arm.com2025-11-12T18:24:33+00:00urn:sha1:c7c198b3ed686300eaf84e679cee7e0f94befa8f
Remove unused SVE operation types. These operations will be reintroduced
in subsequent refactoring, but with a different format.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>