kernel/linux.git/sound/soc/sof/intel/mtl.c, branch v6.6.141

ASoC: SOF: Intel: mtl: Implement firmware boot state check

2024-06-12T09:12:00+00:00

[ Upstream commit 6b1c1c47e76f0161bda2b1ac2e86a219fe70244f ] With the corrected rom_status_reg values we can now add a check for target boot status for firmware booting. With the check now we can identify failed firmware boots (IMR boots) and we can use the fallback to purge boot the DSP. Fixes: 064520e8aeaa ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)") Signed-off-by: Peter Ujfalusi Reviewed-by: Rander Wang Reviewed-by: Kai Vehmanen Reviewed-by: Pierre-Louis Bossart Reviewed-by: Liam Girdwood Link: https://msgid.link/r/20240403105210.17949-6-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

ASoC: SOF: Intel: mtl: Disable interrupts when firmware boot failed

2024-06-12T09:12:00+00:00

[ Upstream commit 26187f44aabdf3df7609b7c78724a059c230a2ad ] In case of error during the firmware boot we need to disable the interrupts which were enabled as part of the boot sequence. Fixes: 064520e8aeaa ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)") Signed-off-by: Peter Ujfalusi Reviewed-by: Rander Wang Reviewed-by: Kai Vehmanen Reviewed-by: Pierre-Louis Bossart Reviewed-by: Liam Girdwood Link: https://msgid.link/r/20240403105210.17949-5-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

ASoC: SOF: Intel: mtl: call dsp dump when boot retry fails

2024-06-12T09:11:59+00:00

[ Upstream commit d5070d0c10326e09276c34568b9a19fb9a727b6e ] Call snd_sof_dsp_dbg_dump() with the same flags/dump_msg as used in function hda_loader.c/cl_dsp_init(). Reviewed-by: Péter Ujfalusi Signed-off-by: Yong Zhi Signed-off-by: Pierre-Louis Bossart Signed-off-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20231127105235.30071-1-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown Stable-dep-of: 26187f44aabd ("ASoC: SOF: Intel: mtl: Disable interrupts when firmware boot failed") Signed-off-by: Sasha Levin

ASoC: SOF: Intel: mtl: Correct rom_status_reg

2024-06-12T09:11:59+00:00

[ Upstream commit 1f1b820dc3c65b6883da3130ba3b8624dcbf87db ] ACE1 architecture changed the place where the ROM updates the status code from the shared SRAM window to HFFLGP1QW0 register for the status and HFFLGP1QW0 + 4 for the error code. The rom_status_reg is not used on MTL because it was wrongly assigned based on older platform convention (SRAM window) and it was giving inconsistent readings. Fixes: 064520e8aeaa ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)") Signed-off-by: Peter Ujfalusi Reviewed-by: Rander Wang Reviewed-by: Kai Vehmanen Reviewed-by: Pierre-Louis Bossart Reviewed-by: Liam Girdwood Link: https://msgid.link/r/20240403105210.17949-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

ASoC: SOF: Intel: pci-mtl: fix ARL-S definitions

2024-06-12T09:11:59+00:00

[ Upstream commit a00be6dc9bb80796244196033aa5eb258b6af47a ] The initial copy/paste from MTL was incorrect, the hardware is different and requires different descriptors along with a dedicated firmware binary. Fixes: 3851831f529e ("ASoC: SOF: Intel: pci-mtl: use ARL specific firmware definitions") Signed-off-by: Pierre-Louis Bossart Reviewed-by: Péter Ujfalusi Reviewed-by: Kai Vehmanen Acked-by: Mark Brown Link: https://lore.kernel.org/r/20231204212710.185976-5-pierre-louis.bossart@linux.intel.com Signed-off-by: Takashi Iwai Stable-dep-of: 1f1b820dc3c6 ("ASoC: SOF: Intel: mtl: Correct rom_status_reg") Signed-off-by: Sasha Levin

ASoC: SOF: Intel: MTL: Reduce the DSP init timeout

2023-09-15T16:14:21+00:00

20s seems unnecessarily large for the DSP init timeout. This coupled with multiple FW boot attempts causes an excessive delay in the error path when booting in recovery mode. Reduce it to 0.5s and use the existing HDA_DSP_INIT_TIMEOUT_US. Link: https://github.com/thesofproject/linux/issues/4565 Signed-off-by: Ranjani Sridharan Reviewed-by: Pierre-Louis Bossart Reviewed-by: Bard Liao Reviewed-by: Péter Ujfalusi Signed-off-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20230915134153.9688-1-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: add abstraction for SoundWire wake-ups

2023-08-07T22:09:45+00:00

The existing code cannot work for LunarLake, let's add a layer of abstraction. No functional change in this patch. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Bard Liao Reviewed-by: Rander Wang Link: https://lore.kernel.org/r/20230807210959.506849-17-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: split MTL and LNL operations

2023-08-07T22:09:36+00:00

It was just a matter of time before we found a case where we needed separate ops for MTL and LNL. For LNL we need to set the DMIC/SSP OFLEN bit in the probe and resume steps, and this can only be done cleanly with separate ops. The function prototypes in mtl.h were added in the same order as their implementation in mtl.c. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://lore.kernel.org/r/20230807210959.506849-8-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: mtl: setup primary core info on MeteorLake platform

2023-06-16T11:53:54+00:00

Set primary core mask and refcount. Reviewed-by: Ranjani Sridharan Reviewed-by: Péter Ujfalusi Signed-off-by: Rander Wang Signed-off-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20230616100039.378150-9-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: mtl: prepare for code reuse

2023-06-05T13:00:59+00:00

Some functions can be used for newer LNL hardware. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Péter Ujfalusi Reviewed-by: Bard Liao Link: https://lore.kernel.org/r/20230602205620.310879-9-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown