<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/sound/soc/sof/intel/hda-loader.c, branch v6.0</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.0</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.0'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-07-12T12:45:05+00:00</updated>
<entry>
<title>ASoC: SOF: Intel: hda: Introduce skip_imr_boot flag</title>
<updated>2022-07-12T12:45:05+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2022-07-12T12:09:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=57724db17a946476f11c1b1be9750bc0cf877adc'/>
<id>urn:sha1:57724db17a946476f11c1b1be9750bc0cf877adc</id>
<content type='text'>
Use a dedicated flag instead of directly checking the
sdev-&gt;system_suspend_target to decide if we need to skip IMR boot due to
too deep sleep state where the memory used for IMR booting will not retain
its content.

The skip_imr_boot flag will be set true during suspend if the target state
is deeper than S3 and reset back to false on successful boot to re-enable
IMR booting in shallower sleep states.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220712120936.28072-2-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: Merge fixes</title>
<updated>2022-06-22T11:14:20+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2022-06-22T11:14:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=644ed467c773ae7649cb54c9709aabc6f2984850'/>
<id>urn:sha1:644ed467c773ae7649cb54c9709aabc6f2984850</id>
<content type='text'>
Needed for new development.
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: disable IMR boot when resuming from ACPI S4 and S5 states</title>
<updated>2022-06-17T09:46:14+00:00</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2022-06-16T20:18:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=58ecb11eab44dd5d64e35664ac4d62fecb6328f4'/>
<id>urn:sha1:58ecb11eab44dd5d64e35664ac4d62fecb6328f4</id>
<content type='text'>
The IMR was assumed to be preserved when suspending to S4 and S5
states, but community reports invalidate that assumption, the hardware
seems to be powered off and the IMR memory content cleared.

Make sure regular boot with firmware download is used for S4 and S5.

BugLink: https://github.com/thesofproject/sof/issues/5892
Fixes: 5fb5f51185126 ("ASoC: SOF: Intel: hda-loader: add IMR restore support")
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220616201818.130802-4-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: IPC4: enable IMR boot</title>
<updated>2022-06-16T08:31:19+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2022-06-16T05:49:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2964e31cdda03fdff3b7c2f4f043e788e607987f'/>
<id>urn:sha1:2964e31cdda03fdff3b7c2f4f043e788e607987f</id>
<content type='text'>
IPC4 based firmwares have unconditional support for IMR boot.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220616054910.16690-1-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOC: Intel: introduce cl_init callback</title>
<updated>2022-06-15T08:56:56+00:00</updated>
<author>
<name>Bard Liao</name>
<email>yung-chuan.liao@linux.intel.com</email>
</author>
<published>2022-06-15T08:43:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ab222a4aaecfafece1516c775143e1cb9eb31612'/>
<id>urn:sha1:ab222a4aaecfafece1516c775143e1cb9eb31612</id>
<content type='text'>
The code loader init sequences are different between versions of
Intel platforms. Have a cl_init callback allows us to reuse the
common code.
No function changed.

Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220615084348.3489-2-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda-loader: Clarify the cl_dsp_init() flow</title>
<updated>2022-06-09T10:27:38+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2022-06-09T08:59:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4643e10a17e549467420aaeeb35c9b3480716618'/>
<id>urn:sha1:4643e10a17e549467420aaeeb35c9b3480716618</id>
<content type='text'>
Update the comment for the cl_dsp_init() to clarify what is done by the
function and use the chip-&gt;init_core_mask instead of BIT(0) when
unstalling/running the init core.

Complements: 2a68ff846164 ("ASoC: SOF: Intel: hda: Revisit IMR boot sequence")
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220609085949.29062-4-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda-loader: Make sure that the fw load sequence is followed</title>
<updated>2022-06-09T10:27:37+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2022-06-09T08:59:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fcb3c775f7073410965ce9414ddb2a1f339c502b'/>
<id>urn:sha1:fcb3c775f7073410965ce9414ddb2a1f339c502b</id>
<content type='text'>
The hda_dsp_enable_core() is powering up _and_ unstall the core in one
call while the first step of the firmware loading  must not unstall the
core.
The core can be unstalled only after the set cpb_cfp and the configuration
of the IPC register for the ROM_CONTROL message.

Complements: 2a68ff846164 ("ASoC: SOF: Intel: hda: Revisit IMR boot sequence")
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220609085949.29062-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: Do not (wrongly) assume positive return value in IMR path</title>
<updated>2022-04-27T13:15:29+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2022-04-27T11:51:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fd2cea169c4bc01f88bca84e4f01df48901c4339'/>
<id>urn:sha1:fd2cea169c4bc01f88bca84e4f01df48901c4339</id>
<content type='text'>
The cl_dsp_init() returns 0 on success or negative errno on error.
Replace the 'if (ret &gt;= 0)' checks with correct 'if (!ret)` to check for
success.

Fixes: 2a68ff846164 ("ASoC: SOF: Intel: hda: Revisit IMR boot sequence")
Reported-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220427115159.26177-1-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda: Revisit IMR boot sequence</title>
<updated>2022-04-22T23:16:27+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2022-04-21T20:20:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2a68ff846164922196c38718ad8dc216819ccd38'/>
<id>urn:sha1:2a68ff846164922196c38718ad8dc216819ccd38</id>
<content type='text'>
The sequence for IMR boot is essentially the same as normal boot with the
difference that instead of DMA from host the firmware is loaded from IMR.

Re-structure the code to use the existing sequence and also add fallback
handling in case the IMR boot fails.

Introduce a new flag to make the IMR boot support check simpler.

Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220421202031.1548362-1-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda: expose some codeloader functions</title>
<updated>2022-04-19T11:03:45+00:00</updated>
<author>
<name>Ranjani Sridharan</name>
<email>ranjani.sridharan@linux.intel.com</email>
</author>
<published>2022-04-14T18:48:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b4e4c0b963c85072326222d7ea89078060aa824c'/>
<id>urn:sha1:b4e4c0b963c85072326222d7ea89078060aa824c</id>
<content type='text'>
Expose the code loader functions for re-use in new platforms

Signed-off-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220414184817.362215-15-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
</feed>
