kernel/linux.git/sound/soc/sof/intel/apl.c, branch v6.12.80

ALSA/ASoC: Intel: clarify Copyright information

2024-05-07T01:37:51+00:00

Merge series from Pierre-Louis Bossart : This patchset does not change any functionality. It only clarifies the Copyright information in ASoC/HDAudio contributions, where an "All rights reserved" notice was mistakenly added in a number of files over the years, likely due to copy/paste. The Intel template never included this statement.

ASoC: SOF: Intel: clarify Copyright information

2024-05-06T14:59:35+00:00

For some reason a number of files included the "All rights reserved" statement. Good old copy-paste made sure this mistake proliferated. Remove the "All rights reserved" in all Intel-copyright to align with internal guidance. Reviewed-by: Cezary Rojewski Signed-off-by: Pierre-Louis Bossart Reviewed-by: Bard Liao Reviewed-by: Péter Ujfalusi Link: https://lore.kernel.org/r/20240503140359.259762-2-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: start splitting top-level from common parts

2024-05-05T14:45:45+00:00

The existing code relies on the 'HDA_COMMON' module and namespace. We need to start splitting top-level parts from the low-level ones, otherwise we will not be able to reuse the low-level parts DMA support for SoundWire/BPT. In the end the dependencies will be: +----------------------------------------------+ | | | v sof-pci-intel-xxx --> sof-intel-hda ------------> sof-hda-common | ^ | | +-> soundwire_intel --> sof_hda_sdw_bpt This patch adds the initial split between the sof-pci-intel-xxx modules and the common parts, in a follow-up patch we will further split the HDA_COMMON parts Since the PCI modules are not all independent, i.e. the CNL parts are also used in JSL and TGL, additional Kconfig and namespace modules were added. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Bard Liao Reviewed-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20240503135221.229202-4-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: Do not use resource managed allocation for ipc4_data

2023-11-29T13:25:14+00:00

Manage the ipc4_data allocation in code instead of devm since the ops_init might be called more than once due to IPC type fallback. Signed-off-by: Peter Ujfalusi Reviewed-by: Kai Vehmanen Link: https://lore.kernel.org/r/20231129125327.23708-13-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: Use generic names for IPC types

2023-09-19T12:49:11+00:00

Use the new SOF_IPC_TYPE_3, SOF_IPC_TYPE_4 in core code. No functional changes, just renaming. Signed-off-by: Peter Ujfalusi Reviewed-by: Daniel Baluta Reviewed-by: Rander Wang Reviewed-by: Ranjani Sridharan Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20230919104226.32239-8-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: Split the set_power_op for IPC3 and IPC4

2023-04-20T11:52:02+00:00

Suspending to S0iX with IPC3 requires the PM_GATE IPC to be sent again to stop the DMA trace. But with IPC4, this is not needed as the trace is stopped with the LARGE_CONFIG_SET IPC. Also, sending the MOD_D0IX IPC to set the D0I3 state again when the DSP is in D0I3 already results in an imbalance in PM runtime states in the firmware. So split the set_power_state ops for IPC3 and IPC4 to avoid sending the MOD_D0IX IPC when the DSP is already in D0I3 with IPC4. Signed-off-by: Ranjani Sridharan Reviewed-by: Rander Wang Reviewed-by: Bard Liao Reviewed-by: Péter Ujfalusi Reviewed-by: Pierre-Louis Bossart Signed-off-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20230420104714.29573-1-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: add d0i3_offset in chip_info

2022-11-07T17:10:07+00:00

MTL has different d0i3 offset compared to cavs platforms. Use d0i3_offset to unify the setting. Reviewed-by: Ranjani Sridharan Signed-off-by: Rander Wang Signed-off-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20221107164154.21925-3-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: Add ipc4 library loading implementation

2022-10-21T12:05:07+00:00

On Intel HDA platforms the library loading is done via DMA and an IPC message is also need to be sent to initiate the downloading of the new library. Co-developed-by: Ranjani Sridharan Signed-off-by: Ranjani Sridharan Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Pierre-Louis Bossart Reviewed-by: Chao Song Reviewed-by: Kai Vehmanen Link: https://lore.kernel.org/r/20221020121238.18339-16-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: ipc4/Intel: Improve and enable IPC error dump

2022-09-23T19:46:25+00:00

Merge series from Peter Ujfalusi : On Intel platforms the registers for DSP communications are used differently, the IPC dump information is not correct since important registers are not printed and existing ones are used a bit differently for IPC4. As a last step, enable the IPC timeout 'handling' and allow the printout of the now usefull IPC dump.

ASoC: SOF: Intel: hda: Add separate ops for ipc_dump for IPC4

2022-09-23T13:53:18+00:00

The use of the IPC registers are different between IPC3 and IPC4. The ipc_dump needs to use different prints depending on the used IPC protocol. Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Kai Vehmanen Reviewed-by: Rander Wang Link: https://lore.kernel.org/r/20220923133616.26267-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown