kernel/linux.git/sound/soc/sof/amd, branch v6.6

ASoC: SOF: amd: fix for firmware reload failure after playback

2023-09-27T09:08:05+00:00

Setting ACP ACLK as clock source when ACP enters D0 state causing firmware load failure as mentioned in below scenario. - Load snd_sof_amd_rembrandt - Play or Record audio - Stop audio - Unload snd_sof_amd_rembrandt - Reload snd_sof_amd_rembrandt If acp_clkmux_sel register field is set, then clock source will be set to ACP ACLK when ACP enters D0 state. During stream stop, if there is no active stream is running then acp firmware will set the ACP ACLK value to zero. When driver is reloaded and clock source is selected as ACP ACLK, as ACP ACLK is programmed to zero, firmware loading will fail. For RMB platform, remove the clock mux selection field so that ACP will use internal clock source when ACP enters D0 state. Fixes: 41cb85bc4b52 ("ASoC: SOF: amd: Add support for Rembrandt plaform.") Reported-by: coolstar Closes: https://github.com/thesofproject/sof/issues/8137 Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20230927071412.2416250-1-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: clear dsp to host interrupt status

2023-08-23T12:27:19+00:00

DSP_SW_INTR_STAT_OFFSET is a common interrupt register which will be accessed by both ACP firmware and driver. This register contains register bits corresponds to host to dsp interrupts and vice versa. when dsp to host interrupt is reported, only clear dsp to host interrupt bit in DSP_SW_INTR_STAT_OFFSET. Fixes: 2e7c6652f9b8 ("ASoC: SOF: amd: Fix for handling spurious interrupts from DSP") Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20230823073340.2829821-7-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: clear panic mask status when panic occurs

2023-08-23T12:27:18+00:00

Due to scratch memory persistence, Once the DSP panic is reported, need to clear the panic mask after handling DSP panic. Otherwise, It results in DSP panic on next reboot. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20230823073340.2829821-6-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: add conditional check for acp_clkmux_sel register

2023-08-23T12:27:17+00:00

Few AMD platforms require ACP ACLK as clock source. Add conditional check for clock mux selection register for switching between internal clock and ACP ACLK. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20230823073340.2829821-5-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: remove redundant clock mux selection register write

2023-08-23T12:27:16+00:00

ACP clock mux selection register is already programmed during acp init sequence. Remove the redundant register write. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20230823073340.2829821-4-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: add module parameter for firmware debug

2023-08-23T12:27:15+00:00

Add module parameter for firmware debug. If firmware debug flag is enabled, clear the fusion stall bit which is required for enabling firmware debugging through JTAG. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20230823073340.2829821-3-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: enable ACP external global interrupt

2023-08-23T12:27:14+00:00

Previously ACP SOF firmware used to enable the ACP external global interrupt register. This will restrict to report ACP host interrupts only after firmware loading is successful. This register needs to be set from host driver to handle other ACP interrupts(SoundWire Interrupts) before loading the ACP firmware. Add field for external interrupt enable register in acp descriptor structure and enable the external interrupt enable register. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20230823073340.2829821-2-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: remove unused sha dma interrupt code

2023-08-23T12:27:13+00:00

During initial development time for RN platform, when SHA dma gets completed, SHA DMA engine used to raise the ACP interrupt. In ACP interrupt handler, SHA DMA interrupt got handled. Currently SHA DMA compleition is verified by checking transfer count using read poll time out logic. Remove unused SHA dma interrupt handling code. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20230823073340.2829821-1-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: Enable signed firmware image loading for Vangogh platform

2023-08-21T15:05:49+00:00

Enable signed firmware loading for Vangogh platform using dmi quirks. Signed-off-by: Venkata Prasad Potturu Link: https://lore.kernel.org/r/20230809123534.287707-3-venkataprasad.potturu@amd.com Signed-off-by: Mark Brown

ASoC: SOF: amd: Add support for signed fw image loading

2023-08-21T15:05:48+00:00

Add support for signed firmware code bin and data bin loading for amd platforms. Signed-off-by: Venkata Prasad Potturu Link: https://lore.kernel.org/r/20230809123534.287707-2-venkataprasad.potturu@amd.com Signed-off-by: Mark Brown